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KBP105G PDF预览

KBP105G

更新时间: 2024-01-18 00:02:29
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 二极管
页数 文件大小 规格书
42页 307K
描述
APPLICATION NOTE

KBP105G 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:R-PSIP-W4Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8541.10.00.80
风险等级:5.75Is Samacsys:N
其他特性:UL RECOGNIZED最小击穿电压:600 V
配置:BRIDGE, 4 ELEMENTS二极管元件材料:SILICON
二极管类型:BRIDGE RECTIFIER DIODE最大正向电压 (VF):1.1 V
JESD-30 代码:R-PSIP-W4湿度敏感等级:1
最大非重复峰值正向电流:30 A元件数量:4
相数:1端子数量:4
最高工作温度:150 °C最低工作温度:-55 °C
最大输出电流:1 A封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:IN-LINE
认证状态:Not Qualified最大重复峰值反向电压:600 V
子类别:Bridge Rectifier Diodes表面贴装:NO
端子形式:WIRE端子位置:SINGLE
Base Number Matches:1

KBP105G 数据手册

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AN1262  
APPLICATION NOTE  
OFFLINE FLYBACK CONVERTERS DESIGN  
METHODOLOGY WITH THE L6590 FAMILY  
by Claudio Adragna  
The design of flyback converters is quite a demanding task that requires SMPS engineers to cope with sev-  
eral problem areas such as magnetics, control loop analysis, power devices, as well as regulations concern-  
ing safety, EMC and the emerging standby consumption requirements. Lots of variable are involved and  
complex tradeoffs are necessary to meet the goal.  
In this scenario, the high-voltage monolithic switchers of the L6590 family greatly simplify the task and, at  
the same time, allow to build robust and cost-effective low-power systems.  
In this application note, after a review of flyback topology, a step-by-step design procedure of an offline sin-  
gle-output flyback converter will be outlined. As an example, the design of the test board will be carried out  
in details.  
1
FLYBACK BASICS  
Flyback operation will be illustrated with reference to the basic circuit and the waveforms of fig. 1. It is a two-  
step process. During the ON-time of the switch, energy is taken from the input and stored in the primary winding  
of the flyback transformer (actually, two coupled inductors). At the secondary side, the catch diode is reverse-  
biased, thus the load is being supplied by the energy stored in the output bulk capacitor.  
Figure 1. Flyback Topology and associated waveforms.  
Vin  
Is  
Lp  
Vout  
Ls  
Vac  
n:1  
Vcc  
Max. Duty cycle  
DRAIN  
Ip  
L6590  
L6590D  
L6590A  
S
R
Driver  
ISOLATED  
FEEDBACK  
Clock  
OSCILLATOR  
Q
2.5 V  
1
1/100  
Rsense  
PWM  
+
-
OCP  
+
VFB  
E/A  
-
LEB  
Clock  
0.5 V  
GND  
COMP  
FREQUENCY  
COMPENSATION  
CLOCK  
CLOCK  
CLOCK  
Q
Q
Q
Ip  
Ip  
Is  
Ip  
Ip  
Is  
Is  
Vdrain  
Vdrain  
Vdrain  
nVout  
Vin  
DCM operation  
TRANSITION  
CCM operation  
May 2001  
1/42  

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