K8C56(57)15ET(B)M
Document Title
NOR FLASH MEMORY
256M Bit (16M x16) Sync Burst , Multi Bank MLC NOR Flash Memory
Revision History
Revision No. History
Draft Date
Remark
0.0
0.5
0.6
Initial
April 1, 2005
Advance
Preliminary
September 1, 2005
November 7, 2005
Preliminary
Preliminary
- Added Burst Access time(11ns@66Mhz, 9ns@83Mhz)
- Correct the Active Write Current (typ.15mA, max.30mA --> typ.25mA,
max.40mA)
- Correct tBDH(Data Hold Time from Next Clock Cycle) from
4ns(@66MHz), 2.25ns(@108MHz), 1.5ns(@133MHz) to
3ns(@66MHz), 2ns(@108MHz), 2ns(@133MHz)
- Correct tRDYA(Clock to RDY Setup Time) from 8ns(@83Mhz) to
9ns(@83MHz)
- Correct tRDYS(RDY setup to Clock) from 4ns(@66MHz),
2.25ns(@108MHz), 1.5ns(@133MHz) to 3ns(@66MHz),
2ns(@108MHz), 2ns(@133MHz)
- Correct typo
0.7
- Add Ordering Information for Density
December 7, 2005
Preliminary
Preliminary
56 : 256Mb for 66/83MHz, 57 : 267Mb for 108/133Mhz
- Add Product Classification Table (Table 1-1)
- Change tAVDH(AVD Hold Time from CLK) from 6ns(@66MHz),
5ns(@83MHz) to 2ns(@66/83MHz)
- Delete tOH(Output Hold Time from Address, CE or OE ) from Asynchronous
Read parameter
- CFI note is added (Max Operation frequency : Data 53H is in 66/83Mhz
part
0.8
1.0
1.1
April 04,2006
- tAVDO is deleted
- Specification is finalized
April 25,2006
Active Asynchronous read Current(@1Mhz) is changed
3mA(typ.),5mA(max.) to 8mA(typ.), 10mA(max.)
September 08,2006
'In erase/program suspend followed by resume operation, min. 200ns is
needed for checking the busy status' is added
Frequency information is added to Programmable Wait State at Burst
Mode Configuration Register Table.
"Asynchronous mode may not support read following four sequential invalid
read condition within 200ns." is added
Correct typo
1.2
October 17, 2006
In write buffer programming part, "And from the third cycle to the last cycle
of Write to Buffer command is also required when using Write-Buffer-Pro-
gramming features in Unlock Bypass mode." is added.
Revision 1.2
October 2006
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