K7N163601A
K7N163201A
K7N161801A
512Kx36/32 & 1Mx18 Pipelined NtRAMTM
PIN CONFIGURATION(TOP VIEW)
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
A10
N.C.
N.C.
N.C.
VDDQ
VSSQ
N.C.
N.C.
DQb8
DQb7
VSSQ
VDDQ
DQb6
DQb5
VDD
1
2
3
4
5
6
7
8
N.C.
N.C.
VDDQ
VSSQ
N.C.
DQa0
DQa1
DQa2
VSSQ
VDDQ
DQa3
DQa4
VSS
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
100 Pin TQFP
(20mm x 14mm)
VDD
VDD
ZZ
VDD
VDD
VSS
DQa5
DQa6
VDDQ
VSSQ
DQa7
DQa8
N.C.
N.C.
VSSQ
VDDQ
N.C.
N.C.
N.C.
DQb4
DQb3
VDDQ
VSSQ
DQb2
DQb1
DQb0
N.C.
VSSQ
VDDQ
N.C.
N.C.
N.C.
K7N161801A(1Mx18)
PIN NAME
SYMBOL
PIN NAME
TQFP PIN NO.
SYMBOL
PIN NAME
TQFP PIN NO.
A0 - A19
Address Inputs
32,33,34,35,36,37,44 VDD
45,46,47,48,49,50,80 VSS
81,82,83,84,99,100
Power Supply(+3.3V) 14,15,16,41,65,66,91
Ground
17,40,67,90
ADV
WE
Address Advance/Load
Read/Write Control Input 88
Clock
Clock Enable
Chip Select
Chip Select
Chip Select
85
No Connect
1,2,3,6,7,25,28,29,30,
38,39,42,43,51,52,53,
56,57,75,78,79,95,96
N.C.
CLK
CKE
CS1
CS2
CS2
89
87
98
97
Data Inputs/Outputs 58,59,62,63,68,69,72,73,74
Data Inputs/Outputs 8,9,12,13,18,19,22,23,24
DQa0~a8
DQb0~b8
92
BWx(x=a,b) Byte Write Inputs
93,94
86
64
OE
ZZ
Output Enable
Power Sleep Mode
Burst Mode Control
Output Power Supply 4,11,20,27,54,61,70,77
(3.3V or 2.5V)
VDDQ
VSSQ
LBO
31
Output Ground
5,10,21,26,55,60,71,76
NOTE : A0 and A1 are the two least significant bits(LSB) of the address field and set the internal burst counter if burst is desired.
- 5 -
May 2002
Rev 2.0