Industrial Temperature
K4E661612D,K4E641612D
CMOS DRAM
4M x 16bit CMOS Dynamic RAM with Extended Data Out
DESCRI PT I O N
T h i s i s
a f a m i l y o f 4 , 1 9 4 , 3 0 4 x 1 6 b i t E x t e n d e d D a t a O u t M o d e C M O S D R A M s . E x t e n d e d D a t a O u t M o d e o f f e r s h i g h s p e e d r a n d o m
a c c e s s o f m e m o r y c e l l s w i t h i n t h e s a m e r o w . R e f r e s h c y c l e ( 4 K R e f . o r 8 K R e f . ) , a c c e s s t i m e ( - 4 5 , - 5 0 o r - 6 0 ) , p o w e r c o n s u m p t i o n ( N o r -
m a l o r L o w p o w e r ) a r e o p t i o n a l f e a t u r e s o f t h i s f a m i l y . A l l o f t h i s f a m i l y h a v e C A S - b e f o r e - R A S r e f r e s h , R A S - o n l y r e f r e s h a n d H i d d e n
r e f r e s h c a p a b i l i t i e s . F u r t h e r m o r e , S e l f - r e f r e s h o p e r a t i o n i s a v a i l a b l e i n L - v e r s i o n . T h i s 4 M x 1 6 E D O M o d e D R A M f a m i l y i s f a b r i c a t e d
u s i n g S a m s u n g ¢s a d v a n c e d C M O S p r o c e s s t o r e a l i z e h i g h b a n d - w i d t h , l o w p o w e r c o n s u m p t i o n a n d h i g h r e l i a b i l i t y .
F E A T U R E S
•
•
•
•
•
•
•
•
•
•
•
•
E x t e n d e d D a t a O u t M o d e o p e r a t i o n
C A S B y t e / W o r d R e a d / W r i t e o p e r a t i o n
•
Part Identification
2
-
-
K 4 E 6 6 1 6 1 2 D - T I / P ( 3 . 3 V , 8 K R e f . )
K 4 E 6 4 1 6 1 2 D - T I / P ( 3 . 3 V , 4 K R e f . )
C A S - b e f o r e - R A S r e f r e s h c a p a b i l i t y
R A S - o n l y a n d H i d d e n r e f r e s h c a p a b i l i t y
F a s t p a r a l l e l t e s t m o d e c a p a b i l i t y
S e l f - r e f r e s h c a p a b i l i t y ( L - v e r o n l y )
L V T T L ( 3 . 3 V ) c o m p a t i b l e i n p u t s a n d o u t p u t s
E a r l y W r i t e o r o u t p u t e n a b l e c o n t r o l l e d w r i t e
J E D E C S t a n d a r d p i n o u t
•
Active Power Dissipation
U n i t : m W
4 K
S p e e d
- 4 5
8 K
A v a i l a b l e i n P l a s t i c T S O P ( I I ) p a c k a g e s
+ 3 . 3 V ±0 . 3 V p o w e r s u p p l y
3 2 4
2 8 8
2 5 2
4 6 8
- 5 0
4 3 2
I n d u s t r i a l T e m p e r a t u r e o p e r a t i n g ( - 4 0 ~ 8 5°C
)
- 6 0
3 9 6
•
Refresh Cycles
F U N C T I O N A L B L O C K D I A G R A M
P a r t
N O .
R e f r e s h
cycle
R e f r e s h t i m e
N o r m a l
6 4 m s
L - v e r
R A S
UCAS
LCAS
W
K 4 E 6 6 1 6 1 2 D *
K 4 E 6 4 1 6 1 2 D
8 K
4 K
Vcc
1 2 8 m s
Control
Vss
Clocks
VBB Generator
*
A c c e s s m o d e & R A S o n l y r e f r e s h m o d e
8 K c y c l e / 6 4 m s ( N o r m a l ) , 8 K c y c l e / 1 2 8 m s ( L - v e r . )
C A S - b e f o r e -R A S H i d d e n r e f r e s h m o d e
4 K c y c l e / 6 4 m s ( N o r m a l ) , 4 K c y c l e / 1 2 8 m s ( L - v e r . )
Lower
Data in
Buffer
:
D Q 0
to
Row Decoder
Refresh Timer
Refresh Control
&
D Q 7
Lower
Data out
Buffer
:
Memory Array
4,194,304 x 16
Cells
O E
Refresh Counter
Row Address Buffer
Col. Address Buffer
Upper
Data in
Buffer
•
Performance Range
D Q8
to
S p e e d
- 4 5
tRAC
4 5 n s
5 0 n s
6 0 n s
tCAC
1 2 n s
1 3 n s
1 5 n s
tRC
tHPC
1 7 n s
2 0 n s
2 5 n s
A0~A12
(A0~A11)*1
Upper
Data out
Buffer
D Q 1 5
7 4 n s
8 4 n s
1 0 4 n s
A0~A8
Column Decoder
(A0~A9)*1
- 5 0
- 6 0
Note) *1
: 4K Refresh
S A M S U N G E L E C T R O N I C S C O . , L T D . reserves the right to
c h a n g e p r o d u c t s a n d s p e c i f i c a t i o n s w i t h o u t n o t i c e .