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ISL94208EVZ PDF预览

ISL94208EVZ

更新时间: 2022-06-24 15:44:44
品牌 Logo 应用领域
英特矽尔 - INTERSIL 电池
页数 文件大小 规格书
36页 916K
描述
4- to 6-Cell Li-ion Battery Management Analog Front-End

ISL94208EVZ 数据手册

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ISL94208  
Ordering Information  
PART NUMBER  
(Notes 1, 2, 3)  
PART  
MARKING  
TEMP RANGE  
(°C)  
PACKAGE  
(Pb-free)  
PKG.  
DWG. #  
ISL94208IRZ  
ISL94208EVZ  
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.  
94208 IRZ  
-40 to +85  
32 Ld 5x5 QFN  
L32.5x5B  
Evaluation Board  
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte  
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil  
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.  
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL94208. For more information on MSL, please see tech brief TB363  
Pin Configuration  
ISL94208  
(32 LD QFN)  
TOP VIEW  
32 31 30 29 28 27 26 25  
TEMPI  
24  
23  
22  
21  
20  
19  
18  
17  
1
2
3
4
VCC  
AO  
VCELL6  
VMON  
CFET  
CB6  
VCELL5  
CB5  
PAD  
DFET  
5
6
7
8
CSENSE  
DSENSE  
VCELL4  
CB4  
VCELL3  
ISREF  
9
10 11 12 13 14 15 16  
Pin Descriptions  
PIN NUMBER  
PIN NAME  
DESCRIPTION  
1
VCC  
VCC supply. This pin provides the operating voltage for the IC circuitry. Connect to the positive terminal of the  
battery pack through a filter.  
14, 12,  
10, 8,  
6, 4,  
2
VCELL0, VCELL1, Battery terminal N voltage input. For N = 1 to 6, VCELLN connects to the positive terminal of CELLN and the  
VCELL2, VCELL3, negative terminal of CELLN + 1.  
VCELL4, VCELL5,  
VCELL6  
13  
VBACK  
Sleep mode backup supply. This pin is used to power the logic when the device is asleep and the RGO output  
turns off.  
31, 32  
VFET1, VFET2  
FET Drivers power Supply. These pins are used to provide the reference voltages for the power FET gate drivers.  
Typically VFET2 connects to VCELL3 (or equivalent voltage) and VFET1 connects to VCELL2 (or equivalent  
voltage).  
15,11, 9  
7, 5, 3  
CB1, CB2, CB3, Cell balancing FET driver output N (N = 1 to 6). An internal FET between the CBN and the VCELL(N - 1) can be  
CB4, CB5, CB6 turned on to discharge CELLN more than other cells, or to shunt some of the charging current away from CELLN.  
This function is used to reduce the voltage on an individual cell relative to other cells in the pack. The cell  
balancing FETs are turned on or off by an external controller, using the I2C interface.  
16  
VSS  
Ground. This pin connects to the most negative terminal in the battery string.  
FN8306.1  
June 21, 2013  
2

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