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ISL9000AIRFJZ PDF预览

ISL9000AIRFJZ

更新时间: 2024-02-22 20:08:25
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
11页 227K
描述
Dual LDO with Low Noise, Very High PSRR, and Low IQ

ISL9000AIRFJZ 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DFN包装说明:HVSON, SOLCC10,.11,20
针数:10Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.67可调性:FIXED
最大回动电压 1:0.5 V标称回动电压 1:0.3 V
最大回动电压 2:0.325 V最大绝对输入电压:7.1 V
最大输入电压:6.5 V最小输入电压:2.3 V
JESD-30 代码:S-PDSO-N10JESD-609代码:e3
长度:3 mm湿度敏感等级:1
功能数量:1输出次数:2
端子数量:10工作温度TJ-Max:125 °C
工作温度TJ-Min:-40 °C最大输出电流 1:0.3 A
最大输出电流 2:0.3 A最大输出电压 1:1.8833 V
最小输出电压 1:1.8167 V标称输出电压 1:1.85 V
最大输出电压 2:2.9522 V最小输出电压 2:2.8478 V
标称输出电压 2:2.9 V封装主体材料:PLASTIC/EPOXY
封装代码:HVSON封装等效代码:SOLCC10,.11,20
封装形状:SQUARE封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
认证状态:Not Qualified调节器类型:FIXED POSITIVE MULTIPLE OUTPUT LDO REGULATOR
座面最大高度:1 mm子类别:Other Regulators
表面贴装:YES技术:CMOS
端子面层:Matte Tin (Sn) - annealed端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40最大电压容差:1.8%
宽度:3 mmBase Number Matches:1

ISL9000AIRFJZ 数据手册

 浏览型号ISL9000AIRFJZ的Datasheet PDF文件第2页浏览型号ISL9000AIRFJZ的Datasheet PDF文件第3页浏览型号ISL9000AIRFJZ的Datasheet PDF文件第4页浏览型号ISL9000AIRFJZ的Datasheet PDF文件第5页浏览型号ISL9000AIRFJZ的Datasheet PDF文件第6页浏览型号ISL9000AIRFJZ的Datasheet PDF文件第7页 
ISL9000A  
®
Data Sheet  
January 10, 2007  
FN6391.0  
Dual LDO with Low Noise, Very High  
PSRR, and Low I  
Features  
Q
• Integrates two 300mA high performance LDO’s  
• Excellent Transient Response To large current steps  
• ±1.8% accuracy over all operating conditions  
ISL9000A is a high performance dual LDO capable of  
sourcing 300mA current from each output. It has a low  
standby current and very high PSRR and is stable with  
output capacitance of 1μF to 10μF with ESR of up to 200mΩ.  
• Excellent load regulation:  
< 0.1% voltage change across full range of load current  
The device integrates an individual Power-On-Reset (POR)  
function for each output. The POR delay for VO2 can be  
externally programmed by connecting a timing capacitor to  
the CPOR pin. The POR delay for VO1 is internally fixed at  
approximately 2ms. A reference bypass pin is also provided  
for connecting a noise filtering capacitor for low noise and  
high-PSRR applications.  
• Low output noise: typically 30μV  
@ 100μA (1.5V)  
rms  
• Very high PSRR: 90dB @ 1kHz  
• Extremely low quiescent current: 42μA (both LDOs active)  
• Wide input voltage capability: 2.3V to 6.5V  
• Low dropout voltage: typically 200mV @ 300mA  
• Stable with 1μF-10μF ceramic capacitors  
The quiescent current is typically only 42μA with both LDO’s  
enabled and active. Separate enable pins control each  
individual LDO output. When both enable pins are low, the  
device is in shutdown, typically drawing less than 0.1μA.  
• Separate enable and POR pins for each LDO  
• Soft-start and staged turn-on to limit input current surge  
during enable  
Several combinations of voltage outputs are standard.  
Others are available on request. Output voltage options for  
each LDO range from 1.2V to 3.6V.  
• Current limit and overheat protection  
• Tiny 10 Ld 3x3mm DFN package  
Pinout  
• -40°C to +85°C operating temperature range  
• Pb-free plus anneal available (RoHS compliant)  
ISL9000A  
(10 LD 3X3 DFN)  
TOP VIEW  
Applications  
• PDAs, Cell Phones and Smart Phones  
• Portable Instruments, MP3 Players  
• Handheld Devices including Medical Handheld  
VO1  
VO2  
1
2
3
4
5
10  
9
VIN  
EN1  
EN2  
8
POR2  
POR1  
GND  
7
CBYP  
6
CPOR  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright © Intersil Americas Inc. 2007. All Rights Reserved.  
1
All other trademarks mentioned are the property of their respective owners.  

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