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ISL81487EIP-T

更新时间： 2024-02-10 09:28:57
品牌 Logo 应用领域
瑞萨 - RENESAS 驱动信息通信管理光电二极管接口集成电路驱动器
页数 文件大小 规格书
14页 527K
描述
LINE TRANSCEIVER, PDIP8, PLASTIC, MS-001BA, DIP-8

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ISL81487EIP-T 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Transferred零件包装代码：DIP
包装说明：PLASTIC, MS-001BA, DIP-8针数：8
Reach Compliance Code：not_compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.55
差分输出：YES驱动器位数：1
输入特性：DIFFERENTIAL SCHMITT TRIGGER接口集成电路类型：LINE TRANSCEIVER
接口标准：EIA-422; EIA-485JESD-30 代码：R-PDIP-T8
JESD-609代码：e0长度：9.585 mm
功能数量：1端子数量：8
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
最大接收延迟：150 ns接收器位数：1
座面最大高度：5.33 mm最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
表面贴装：NO技术：BICMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
最大传输延迟：50 ns宽度：7.62 mm

ISL81487EIP-T 数据手册

 浏览型号ISL81487EIP-T的Datasheet PDF文件第3页浏览型号ISL81487EIP-T的Datasheet PDF文件第4页浏览型号ISL81487EIP-T的Datasheet PDF文件第5页浏览型号ISL81487EIP-T的Datasheet PDF文件第7页浏览型号ISL81487EIP-T的Datasheet PDF文件第8页浏览型号ISL81487EIP-T的Datasheet PDF文件第9页 
ISL8487E, ISL81487L, ISL81487E  
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified.  
CC  
CC  
Typicals are at V  
= 5V, T = 25°C, (Note 2) (Continued)  
A
TEMP  
(°C)  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
MIN  
TYP  
MAX UNITS  
Receiver Enable from Shutdown to  
Output High  
t
C
C
= 15pF, SW = GND, (Figure 5, Notes 7, 9)  
Full  
-
800  
2500  
ns  
ZH(SHDN)  
L
Receiver Enable from Shutdown to  
Output Low  
t
= 15pF, SW = V , (Figure 5, Notes 7, 9)  
CC  
Full  
-
800  
2500  
ns  
ZL(SHDN)  
L
SWITCHING CHARACTERISTICS (ISL81487L)  
Driver Input to Output Delay  
Driver Output Skew  
t
, t  
PLH PHL  
R
R
R
C
C
C
C
= 54Ω, C = 100pF, (Figure 2)  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
25  
150  
-
650  
160  
900  
1000  
1000  
750  
750  
175  
13  
1200  
600  
1200  
1500  
1500  
1500  
1500  
250  
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
kbps  
ns  
ns  
DIFF  
DIFF  
DIFF  
L
t
= 54Ω, C = 100pF, (Figure 2)  
L
SKEW  
t , t  
Driver Differential Rise or Fall Time  
Driver Enable to Output High  
Driver Enable to Output Low  
Driver Disable from Output High  
Driver Disable from Output Low  
Receiver Input to Output Delay  
= 54Ω, C = 100pF, (Figure 2)  
250  
100  
100  
150  
150  
30  
-
R
F
L
t
= 100pF, SW = GND, (Figure 3, Note 5)  
ZH  
L
L
L
L
t
= 100pF, SW = V , (Figure 3, Note 5)  
CC  
ZL  
t
= 15pF, SW = GND, (Figure 3)  
HZ  
t
= 15pF, SW = V , (Figure 3)  
CC  
LZ  
, t  
t
(Figure 4)  
(Figure 4)  
PLH PHL  
Receiver Skew | t  
- t  
PLH PHL  
|
t
SKD  
Receiver Enable to Output High  
Receiver Enable to Output Low  
Receiver Disable from Output High  
Receiver Disable from Output Low  
Maximum Data Rate  
t
t
C
C
C
C
= 15pF, SW = GND, (Figure 5, Note 6)  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
-
10  
50  
ZH  
L
L
L
L
t
= 15pF, SW = V , (Figure 5, Note 6)  
CC  
-
10  
50  
ZL  
= 15pF, SW = GND, (Figure 5)  
-
10  
50  
HZ  
t
= 15pF, SW = V , (Figure 5)  
CC  
-
10  
50  
LZ  
f
250  
50  
-
-
-
MAX  
Time to Shutdown  
t
(Note 7)  
140  
1100  
600  
2000  
SHDN  
Driver Enable from Shutdown to  
Output High  
t
t
C
C
C
C
= 100pF, SW = GND, (Figure 3, Notes 7, 8)  
ZH(SHDN)  
L
L
L
L
Driver Enable from Shutdown to  
Output Low  
t
= 100pF, SW = V , (Figure 3, Notes 7, 8)  
CC  
Full  
Full  
Full  
-
-
-
1000  
900  
2000  
2000  
2000  
ns  
ns  
ns  
ZL(SHDN)  
Receiver Enable from Shutdown to  
Output High  
= 15pF, SW = GND, (Figure 5, Notes 7, 9)  
ZH(SHDN)  
Receiver Enable from Shutdown to  
Output Low  
t
= 15pF, SW = V , (Figure 5, Notes 7, 9)  
CC  
900  
ZL(SHDN)  
ESD PERFORMANCE  
RS-485 Pins (A/Y, B/Z)  
All Other Pins  
Human Body Model  
25  
25  
-
-
±15  
>±7  
-
-
kV  
kV  
NOTES:  
2. Currents into device pins are positive; currents out of device pins are negative. Voltages are referenced to ground unless otherwise specified.  
3. Supply current specification is valid for loaded drivers when DE = 0V.  
4. Applies to peak current. See “Typical Performance Curves” for more information.  
5. When testing the ISL8487E and ISL81487L, keep RE = 0 to prevent the device from entering SHDN.  
6. When testing the ISL8487E and ISL81487L, the RE signal high time must be short enough (typically <200ns) to prevent the device from entering  
SHDN.  
7. The ISL8487E and ISL81487L are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 50ns, the parts  
are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See  
“Low-Power Shutdown Mode” section.  
8. Keep RE = V , and set the DE signal low time >600ns to ensure that the device enters SHDN.  
CC  
9. Set the RE signal high time >600ns to ensure that the device enters SHDN.  
10. Devices meeting these limits are denoted as “1/8 unit load (1/8 UL)” transceivers. The RS-485 standard allows up to 32 Unit Loads on the bus,  
so there can be 256 1/8 UL devices on a bus.  
FN6051.6  
6
1...3456789...14

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