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ISL6271ACR PDF预览

ISL6271ACR

更新时间: 2024-01-13 09:45:03
品牌 Logo 应用领域
英特矽尔 - INTERSIL 稳压器
页数 文件大小 规格书
16页 583K
描述
Integrated XScale Regulator

ISL6271ACR 技术参数

生命周期:Active零件包装代码:QFN
包装说明:HVQCCN,针数:20
Reach Compliance Code:unknown风险等级:5.73
模拟集成电路 - 其他类型:SWITCHING REGULATOR控制技术:PULSE WIDTH MODULATION
最大输入电压:5.5 V最小输入电压:2.76 V
标称输入电压:3.7 VJESD-30 代码:S-PQCC-N20
长度:4 mm功能数量:1
端子数量:20最高工作温度:85 °C
最低工作温度:-25 °C最大输出电流:0.8 A
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
座面最大高度:1 mm表面贴装:YES
切换器配置:BUCK温度等级:OTHER
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD宽度:4 mm

ISL6271ACR 数据手册

 浏览型号ISL6271ACR的Datasheet PDF文件第2页浏览型号ISL6271ACR的Datasheet PDF文件第3页浏览型号ISL6271ACR的Datasheet PDF文件第4页浏览型号ISL6271ACR的Datasheet PDF文件第5页浏览型号ISL6271ACR的Datasheet PDF文件第6页浏览型号ISL6271ACR的Datasheet PDF文件第7页 
ISL6271A  
®
Data Sheet  
October 8, 2004  
FN9171.1  
Integrated XScale Regulator  
Features  
• Three Voltage Regulators (1 Buck, 2 LDOs)  
• High-Efficiency, fully-Integrated synchronous buck  
regulator with DVM  
The ISL6271A is a versatile power management IC (PMIC)  
designed for the Xscale type of processors. The device  
2
integrates three regulators, two fault indicators and an I C  
bus for communication with a host microprocessor. Two of  
the three regulators function as low power, low drop out  
regulators, designed to power SRAM and phase-lock loop  
circuitry internal to the Xscale processor. The third regulator  
uses a proprietary switch-mode topology to power the  
processor core and facilitate Dynamic Voltage Management  
(DVM), as defined by Intel.  
• 800mA DC output current for the buck regulator  
• Proprietary ‘Synthetic Ripple’ Control Topology  
• Greater than 1MHz Switching Frequency  
• Diode emulation for light load efficiency  
2
• I C Interface Module for DVM from 0.85V to 1.6V  
• Optional fixed 4-bit VID-control in lieu of DVM  
• Small Output Inductor and Capacitor  
• Battery Fault signal  
• Input Supply Voltage Range: 2.76V-5.5V  
• 4x4 mm QFN Package:  
- Compliant to JEDEC PUB95 MO-220  
QFN - Quad Flat No Leads - Package Outline  
- Near Chip Scale Package footprint, which improves  
PCB efficiency and has a thinner profile  
Since power dissipation inside a microprocessor is  
proportional to the square of the core voltage, Intel XScale  
processors implement DVM as a means to more efficiently  
utilize battery capacity. To support this power saving  
2
architecture, the ISL6271A integrates an I C bus for  
communication with the host processor. The processor, acting  
as the bus master, transmits a “voltage level” and “voltage  
slew rate” to the ISL6271A appropriate to the processing  
requirements; higher core voltages support higher operating  
frequencies and code execution. The bus is fully compliant  
• Pb-free Available (RoHS Compliant)  
2
with the Phillips® I C protocol and supports both standard  
and fast data transmission modes. Alternatively, the output of  
the core regulator can be programmed in 50mV increments  
from 0.85V to 1.6V using the input Voltage ID (VID) pins. All  
three regulators share a common enable pin and are  
protected against overcurrent, over temperature and  
undervoltage conditions. When disabled via the enable pin,  
the ISL6271A enters a low power state that can be used to  
conserve battery life while maintaining the last programmed  
VID code and slew rate. An integrated soft-start circuit  
transitions the ISL6271A output voltages to their default  
values at a rate determined by an external soft-start capacitor.  
Applications  
• PDA  
• Cell Phone  
Tablet Devices  
• Embedded Processors  
Related Literature  
Technical Brief TB379 “Thermal Characterization of  
Packaged Semiconductor Devices”  
Technical Brief TB389 “PCB Land Pattern Design and  
Pinout  
Surface Mount Guidelines for QFN Packages“  
ISL6271A (4x4 QFN) TOP VIEW  
• Application Note AN1139 “Setup Instruction for the  
ISL6271 Evaluation Kit”  
Ordering Information  
20 19 18 17 16  
TEMP.  
PKG.  
DWG. #  
VCC  
VIDEN  
LVCC  
VPLL  
VSRAM  
FB  
1
2
3
4
5
15  
14  
13  
12  
11  
PART NUMBER*  
ISL6271ACR  
RANGE (°C)  
PACKAGE  
-25 to 85  
-25 to 85  
20 Ld 4x4 QFN L20.4x4  
ISL6271ACRZ (Note)  
20 Ld 4x4 QFN L20.4x4  
(Pb-free)  
SCL/VID0  
SDA/VID1  
VID2  
*Add “-T” suffix for tape and reel.  
VOUT  
NOTE: Intersil Pb-free products employ special Pb-free material sets;  
molding compounds/die attach materials and 100% matte tin plate  
termination finish, which are RoHS compliant and compatible with both  
SnPb and Pb-free soldering operations. Intersil Pb-free products are  
MSL classified at Pb-free peak reflow temperatures that meet or  
exceed the Pb-free requirements of IPC/JEDEC J STD-020C.  
6
7
8
9
10  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2004. All Rights Reserved  
1
Intel® is a registered trademark of Intel Corporation. All other trademarks mentioned are the property of their respective owners.  

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