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ISL55100AEVAL3Z

更新时间： 2024-09-29 20:00:31
品牌 Logo 应用领域
瑞萨 - RENESAS 驱动接口集成电路
页数 文件大小 规格书
11页 646K
描述
Quad 18V Pin Electronics Driver/Window Comparator Evaluation Boards

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ISL55100AEVAL3Z 技术参数

生命周期：Active包装说明：,
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.76
接口集成电路类型：BUFFER OR INVERTER BASED PERIPHERAL DRIVER峰值回流温度（摄氏度）：NOT SPECIFIED
处于峰值回流温度下的最长时间：NOT SPECIFIEDBase Number Matches：1

ISL55100AEVAL3Z 数据手册

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ISL55100A/BEVAL3/3Z Evaluation Board User’s  
Guide  
®
Application Note  
September 12, 2008  
AN1217.1  
ISL55100 Device Application Overview  
The ISL55100 is a Quad Driver/Receiver device that is  
typically utilized in bi-directional testing applications where  
formatted timing sets “write data to” and “read data back”  
from digital devices.  
Examples of bi-directional bus based devices are UARTs,  
Real Time Clocks, Interrupt Controllers, Parallel I/O devices,  
FPGA's and others. Memory devices are also bi-directional  
in that data can be stored in them and then retrieved at a  
later time.  
The ISL55100 provides four driver/receiver pairs  
(DOUT0-3/VINP0-3) that are usually tied together in order to  
support bi-directional communications (bus cycle emulation).  
HIZ control of the drivers enables this configuration.  
FIGURE 2. DEVICE AREA, ISL55100A/BEVAL3/3Z  
EVALUATION BOARD  
The ISL55100A/BEVAL3/3Z Evaluation Board enables easy  
access to the various ISL55100 connections. All inputs and outputs  
are matched for signal path length.  
1
DATA+0  
2
DATA-0  
LOW  
DRIVER RAILS  
HIGH  
MINI  
THRESHOLDS  
MAX0  
RCVR  
DOUT0  
72  
71  
52  
22  
/DRV EN+0  
/DRV EN-0  
.
VINP0  
7
8
DATA+1  
DATA-1  
QUAD - WIDE RANGE, LOW ROUT, TRI-STATABLE - DRIVERS  
VH(0-3)  
5
6
48  
29  
DOUT1  
VINP1  
/DRV EN+1  
/DRV EN-1  
13  
14  
ISL55100  
DATA+2  
DATA-2  
DATA+(0-3)  
DOUT(0-3)  
+
11  
12  
44  
32  
-
DOUT2  
VINP2  
/DRV EN+2  
/DRV EN-2  
DATA-(0-3)  
VL(0-3)  
19  
20  
DRV_EN+(0-3)  
DATA+3  
DATA-3  
+
-
VCC 27, 59, 61, 67  
VEE 26, 60, 62, 68  
17  
18  
40  
36  
DOUT3  
VINP3  
/DRV EN+3  
/DRV EN-3  
DRV_EN-(0-3)  
COMPARATOR OUTPUTS  
BITS 0- 3  
QUAD - DUAL LEVEL COMPARATOR - RECEIVERS  
37  
/LOWSWING  
24  
25  
COMP OUT HIGH RAIL  
COMP OUT LOW RAIL  
V
CC  
COMP HIGH  
QA(0-3)  
CVA(0-3)  
VINP(0-3)  
COMP LOW  
V
V
EE  
FIGURE 1. FUNCTIONAL ISL55100A/BEVAL3/3Z PINOUT  
CC  
COMP HIGH  
The ISL55100 provides the means of “translating” the DUT's  
bus levels for a test system (Figure 3). Level translation on  
“Write Operations” is accomplished with the drivers. “Read  
Operation” level translation is done via the  
receiver/comparators. Comparator QA/QB outputs adjust  
their levels to the tester side logic levels by way of the  
COMP-HIGH and COMP-LOW levels. Comparators in the  
receivers set the DUT side level thresholds. Further the  
Window Comparators (Dual Threshold Receivers) enable  
received data to be verified for proper levels (Valid1, Valid 0).  
Level translation enables the Pin Electronics Pattern  
Devices to write data to and read data back from different  
types of logic families.  
QB(0-3)  
COMP LOW  
CVB(0-3)  
V
EE  
FIGURE 3. DIAGRAM OF ISL55100A/BEVAL3/3Z DRIVERS  
AND RECEIVERS  
The ISL55100A/BEVAL3/3Z is made up of four drivers and four dual  
level receivers. Drivers provide voltage level translation for “Write”  
operations while the Dual Level Comparators translate voltage  
levels for “Read” operations.  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2005, 2008. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  
 
 
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