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ISL55100AIRZ-T7A PDF预览

ISL55100AIRZ-T7A

更新时间: 2024-01-26 12:58:18
品牌 Logo 应用领域
瑞萨 - RENESAS 驱动接口集成电路
页数 文件大小 规格书
14页 954K
描述
Quad 18V Pin Electronics Driver/Window Comparator

ISL55100AIRZ-T7A 技术参数

生命周期:Active零件包装代码:QFN
针数:72Reach Compliance Code:compliant
风险等级:2.07接口集成电路类型:BUFFER OR INVERTER BASED PERIPHERAL DRIVER
Base Number Matches:1

ISL55100AIRZ-T7A 数据手册

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DATASHEET  
ISL55100A  
Quad 18V Pin Electronics Driver/Window Comparator  
FN7486  
Rev 3.00  
December 4, 2014  
The ISL55100A is a Quad pin driver and window comparator  
fabricated in a wide voltage CMOS process. It is designed  
specifically for Test During Burn In (TDBI) applications, where  
cost, functional density and power are all at a premium.  
Features  
• Low driver output resistance  
- R  
OUT  
maximum: ISL55100A 7.0Ω  
This IC incorporates four channels of programmable drivers  
and window comparators into a small 72 Ld QFN package.  
Each channel has independent driver levels, data and high  
impedance control. Each receiver has dual comparators, which  
provide high and low threshold levels.  
• 18V I/O range  
• 50MHz operation  
• 4-channel driver/receiver pairs with per pin flexibility  
• Dual level - per pin - input thresholds  
• Differential or single-ended digital inputs  
• User defined comparator output levels  
• Low channel-to-channel timing skew  
• Small footprint (72 Ld QFN)  
The ISL55100A uses differential mode digital inputs and can  
therefore mate directly with LVDS or CML outputs.  
Single-ended logic families are handled by connecting one of  
the digital input pins to an appropriate threshold voltage (e.g.,  
1.4V for TTL compatibility). The comparator outputs are  
single-ended and the output levels are user defined to mate  
directly with any digital technology.  
• Pb-free (RoHS compliant)  
Applications  
• Burn in ATE  
The 18V driver output and receiver input ranges allow this  
device to interface directly with TTL, ECL, CMOS (3V, 5V and  
7V), LVCMOS and custom level circuitry, as well as the high  
voltage (super voltage) level required for many special test  
modes for Flash Devices.  
• Wafer level flash memory test  
• LCD panel test  
• Low cost ATE  
• Instrumentation  
• Emulation  
• Device programmers  
Functional Block Diagram  
QUAD - WIDE RANGE, LOW ROUT, TRI-STATEABLE - DRIVERS  
VH(0:3)  
DATA+(0:3)  
DOUT(0:3)  
+
-
DATA-(0:3)  
VL(0:3)  
DRVEN+(0:3)  
+
-
DRVEN-(0:3)  
QUAD - DUAL LEVEL COMPARATOR - RECEIVERS  
V
CC  
COMP HIGH  
QA(0:3)  
+
-
CVA(0:3)  
VINP(0:3)  
COMP LOW  
V
EE  
CC  
V
COMP HIGH  
+
-
QB(0:3)  
COMP LOW  
CVB(0:3)  
V
EE  
FN7486 Rev 3.00  
December 4, 2014  
Page 1 of 14  

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