Single, Low Voltage Digitally Controlled Potentiometer
(XDCP™)
ISL23315
Features
2
• 256 resistor taps
The ISL23315 is a volatile, low voltage, low noise, low power, I C
™
Bus , 256 Taps, single digitally controlled potentiometer (DCP),
2
• I C serial interface
which integrates DCP core, wiper switches and control logic on
a monolithic CMOS integrated circuit.
- No additional level translator for low bus supply
- Two address pins allow up to four devices per bus
The digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
• Wiper resistance: 70Ω typical @ V = 3.3V
CC
• Shutdown Mode - forces the DCP into an end-to-end open
2
I C bus interface. The potentiometer has an associated
circuit and R is shorted to R internally
W
L
volatile Wiper Register (WR) that can be directly written to and
read by the user. The contents of the WR controls the position
of the wiper. When powered on, the ISL23315’s wiper will
always commence at mid-scale (128 tap position).
• Power-on preset to mid-scale (128 tap position)
• Standby current <2.5µA max
• Shutdown current <2µA max
• Power supply
The low voltage, low power consumption, and small package
of the ISL23315 make it an ideal choice for use in battery
operated equipment. In addition, the ISL23315 has a V
- V = 1.7V to 5.5V analog power supply
CC
LOGIC
pin allowing down to 1.2V bus operation, independent from the
value. This allows for low logic levels to be connected
2
- V
LOGIC
= 1.2V to 5.5V I C bus/logic power supply
V
CC
• DCP terminal voltage from 0V to V
CC
directly to the ISL23315 without passing through a voltage
level shifter.
• 10kΩ, 50kΩ or 100kΩ total resistance
• Extended industrial temperature range: -40°C to +125°C
• 10 Ld MSOP or 10 Ld µTQFN packages
• Pb-free (RoHS compliant)
The DCP can be used as a three-terminal potentiometer or as a
two-terminal variable resistor in a wide variety of applications
including control, parameter adjustments, and signal processing.
Applications
• Power supply margining
• RF power amplifier bias compensation
• LCD bias compensation
• Laser diode bias compensation
10000
8000
6000
4000
2000
0
VREF
-
VREF_M
ISL23315
+
ISL28114
0
50
100
150
200
250
TAP POSITION (DECIMAL)
FIGURE 2. V
ADJUSTMENT
REF
FIGURE 1. FORWARD AND BACKWARD RESISTANCE vs TAP
POSITION, 10k DCP
December 15, 2010
FN7778.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2010. All Rights Reserved
Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners
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