ISD4004 Series
PROGRAMMING
DETAILED DESCRIPTION
The ISD4004 se rie s is a lso ide a l for pla yba c k-only
a pplic a tions, whe re single or m ultiple m e ssa ge
Pla yba c k is c ontrolle d through the SPI port. Once
the desired messa ge configura tion is crea ted, du-
plic a te s c a n e a sily be ge ne ra te d via a n ISD pro-
gra m m e r.
SPEECH/SOUND QUALITY
The ISD4004 ChipCorde r se rie s inc lude s devices
offered a t 4.0, 5.3, 6.4, a nd 8.0 KHz sa mpling fre -
que nc ie s, a llowing the use r a c hoic e of spe e c h
qua lity options. Inc re a sing the dura tion within a
produc t se rie s de c re a se s the sa m pling fre que nc y
a nd ba ndwidth, whic h a ffe c ts sound qua lity.
Plea se refer to the ISD4004 Series Product Summ a ry
ta ble on the se c ond pa ge to c om pa re filte r pa ss
ba nd a nd produc t dura tions.
PIN DESCRIPTIONS
VOLTAGE INPUTS (VCCA, VCCD
)
To minim ize noise , the a na log a nd digita l c irc uits
in the ISD4004 devices use sepa ra te power busses.
The se + 3 V busse s a re brought out to se pa ra te
pins a nd should be tie d toge the r a s c lose to the
supply a s possible . In a ddition, the se supplie s
should be de c ouple d a s c lose to the pa c ka ge a s
possible .
The speech sa mples a re stored directly into on-chip
nonvola tile m e mory without the digitiza tion a nd
c ompre ssion a ssoc ia te d with othe r solutions. Di-
re c t a na log stora ge provide s a na tura l sounding
re produc tion of voic e , m usic , tone s, a nd sound
e ffe c ts not a va ila ble with most solid-sta te solu-
tions.
GROUND INPUTS (VSSA, VSSD)
The ISD4004 se rie s utilize s se pa ra te a na log a nd
DURATION
To m e e t e nd syste m re quire m e nts, the ISD4004 se-
ries produc ts a re single -c hip solutions a t 8, 10, 12,
16 m inute s.
digita l ground busse s. The a na log ground (V
)
SSA
pins should be tie d toge the r a s c lose to the pa c k-
a ge a s possible a nd c onne c te d through a low-
im pe da nc e pa th to powe r supply ground. The
FLASH STORAGE
digita l ground (V ) pin should be c onne c te d
SSD
through a se pa ra te low-im pe da nc e pa th to pow-
e r supply ground. The se ground pa ths should be
la rge e nough to e nsure tha t the im pe da nc e be -
twe e n the V pins a nd the V pin is le ss tha n
One of the benefits of ISD’s ChipCorder technology
is the use of on-chip nonvola tile memory, which pro-
vides ze ro-powe r m e ssa ge stora ge . The m e ssa ge
is re ta ine d for up to 100 ye a rs (typic a lly) without
powe r. In a ddition, the de vic e c a n be re -re c ord-
e d (typic a lly) ove r 100,000 time s.
SSA
SSD
3 W. The ba c kside of the die is c onne c te d to V
SS
through the substra te re sista nc e . In a c hip-on-
boa rd de sign, the die a tta c h a re a m ust be c on-
MICROCONTROLLER INTERFACE
ne c te d to V or le ft floa ting.
SS
A four-wire (SCLK, MOSI, MISO, SS) SPI inte rfa c e is
provide d for ISD4004 c ontrol a nd a ddre ssing
func tions. The ISD4004 is c onfigure d to ope ra te a s
a pe riphe ra l sla ve de vic e , with a mic roc ontrolle r-
ba se d SPI bus inte rfa c e . Re a d/Write a c c e ss to a ll
the inte rna l re giste rs oc c urs through this SPI inte r-
fa c e . An inte rrupt signa l (INT) a nd inte rna l re a d-
only Sta tus Re giste r a re provide d for ha ndsha ke
purpose s.
ISD
1
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