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IS42R16100E-10TLI PDF预览

IS42R16100E-10TLI

更新时间: 2024-01-25 18:11:24
品牌 Logo 应用领域
美国芯成 - ISSI 时钟动态存储器光电二极管内存集成电路
页数 文件大小 规格书
79页 888K
描述
Synchronous DRAM, 1MX16, 7ns, CMOS, PDSO50, 0.400 INCH, LEAD FREE, PLASTIC, TSOP2-50

IS42R16100E-10TLI 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSOP2
包装说明:TSOP2, TSOP50,.46,32针数:50
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.02风险等级:5.4
访问模式:DUAL BANK PAGE BURST最长访问时间:7 ns
其他特性:AUTO/SELF REFRESH最大时钟频率 (fCLK):100 MHz
I/O 类型:COMMON交错的突发长度:1,2,4,8
JESD-30 代码:R-PDSO-G50JESD-609代码:e3
长度:20.95 mm内存密度:16777216 bit
内存集成电路类型:SYNCHRONOUS DRAM内存宽度:16
湿度敏感等级:3功能数量:1
端口数量:1端子数量:50
字数:1048576 words字数代码:1000000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:1MX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装等效代码:TSOP50,.46,32
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
峰值回流温度(摄氏度):260电源:2.5 V
认证状态:Not Qualified刷新周期:2048
座面最大高度:1.2 mm自我刷新:YES
连续突发长度:1,2,4,8,FP最大待机电流:0.001 A
子类别:DRAMs最大压摆率:0.05 mA
最大供电电压 (Vsup):2.75 V最小供电电压 (Vsup):2.25 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.8 mm端子位置:DUAL
处于峰值回流温度下的最长时间:10宽度:10.16 mm
Base Number Matches:1

IS42R16100E-10TLI 数据手册

 浏览型号IS42R16100E-10TLI的Datasheet PDF文件第2页浏览型号IS42R16100E-10TLI的Datasheet PDF文件第3页浏览型号IS42R16100E-10TLI的Datasheet PDF文件第4页浏览型号IS42R16100E-10TLI的Datasheet PDF文件第5页浏览型号IS42R16100E-10TLI的Datasheet PDF文件第6页浏览型号IS42R16100E-10TLI的Datasheet PDF文件第7页 
IS42R16100E  
AUGUST 2008  
512K Words x 16 Bits x 2 Banks (16-MBIT)  
SYNCHRONOUS DYNAMIC RAM  
FEATURES  
DESCRIPTION  
•ꢀ Clockꢀfrequency:ꢀ143,ꢀ100ꢀMHz  
ISSI’sꢀ16MbꢀSynchronousꢀDRAMꢀIS42R16100Eꢀisꢀ  
organizedꢀasꢀaꢀ524,288-wordꢀxꢀ16-bitꢀxꢀ2-bankꢀforꢀ  
improvedꢀperformance.ꢀTheꢀsynchronousꢀDRAMsꢀ  
achieve high-speed data transfer using pipeline  
architecture. All inputs and outputs signals refer to the  
rising edge of the clock input.  
•ꢀ Fullyꢀsynchronous;ꢀallꢀsignalsꢀreferencedꢀtoꢀaꢀ  
positive clock edge  
•ꢀ Twoꢀbanksꢀcanꢀbeꢀoperatedꢀsimultaneouslyꢀandꢀ  
independently  
•ꢀ DualꢀinternalꢀbankꢀcontrolledꢀbyꢀA11ꢀ  
(bank select)  
PIN CONFIGURATIONS  
50-Pin TSOP (Type II)  
•ꢀ Singleꢀ2.5Vꢀpowerꢀsupply  
•ꢀ LVTTLꢀinterface  
VDD  
DQ0  
DQ1  
GNDQ  
DQ2  
DQ3  
VDDQ  
DQ4  
DQ5  
GNDQ  
DQ6  
DQ7ꢀ  
VDDQ  
LDQM  
WE  
1
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
GND  
DQ15ꢀ  
IDQ14ꢀ  
GNDQꢀ  
DQ13ꢀ  
DQ12  
VDDQ  
DQ11  
DQ10  
GNDQ  
DQ9  
DQ8ꢀ  
VDDQ  
NC  
UDQM  
CLK  
CKEꢀ  
NC  
A9  
A8  
A7  
A6  
A5  
•ꢀ Programmableꢀburstꢀlengthꢀ  
–ꢀ(1,ꢀ2,ꢀ4,ꢀ8,ꢀfullꢀpage)  
2
3
4
5
•ꢀ Programmableꢀburstꢀsequence:ꢀ  
Sequential/Interleave  
6
7
8
•ꢀ 2048ꢀrefreshꢀcyclesꢀeveryꢀ64ꢀms  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
•ꢀ Randomꢀcolumnꢀaddressꢀeveryꢀclockꢀcycle  
•ꢀ ProgrammableꢀCASꢀlatencyꢀ(2,ꢀ3ꢀclocks)  
•ꢀ Burstꢀread/writeꢀandꢀburstꢀread/singleꢀwriteꢀ  
CAS  
RAS  
CS  
operations capability  
•ꢀ Burstꢀterminationꢀbyꢀburstꢀstopꢀandꢀ  
A11  
A10  
A0  
A1  
precharge command  
•ꢀ ByteꢀcontrolledꢀbyꢀLDQMꢀandꢀUDQM  
•ꢀ Packagesꢀ400-milꢀ50-pinꢀTSOP-II  
•ꢀ Lead-freeꢀpackageꢀoption  
A2  
A3  
VDD  
A4  
GND  
•ꢀ Availableꢀinꢀindustrialꢀtemperature  
PIN DESCRIPTIONS  
A0-A11  
Address Input  
CAS  
Column Address Strobe Command  
A0-A10ꢀ ꢀ  
RowꢀAddressꢀInput  
BankꢀSelectꢀAddress  
Column Address Input  
WEꢀ  
WriteꢀEnable  
A11ꢀꢀ  
LDQMꢀ LowerꢀBye,ꢀInput/OutputꢀMask  
UDQMꢀ UpperꢀBye,ꢀInput/OutputꢀMask  
A0-A7  
DQ0ꢀtoꢀDQ15ꢀ  
DataꢀDQꢀ  
VDDꢀ  
GNDꢀ  
Power  
CLKꢀ  
CKEꢀ  
CS  
SystemꢀClockꢀInput  
ClockꢀEnable  
Ground  
VDDQꢀ PowerꢀSupplyꢀforꢀDQꢀPin  
GNDQꢀ GroundꢀforꢀDQꢀPin  
Chip Select  
RASꢀ  
RowꢀAddressꢀStrobeꢀCommand  
NC  
No Connection  
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without  
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-  
est version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. — www.issi.com  
1
Rev. B  
08/07/08  

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