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IS41C16105 PDF预览

IS41C16105

更新时间: 2024-01-05 14:44:36
品牌 Logo 应用领域
美国芯成 - ISSI /
页数 文件大小 规格书
18页 142K
描述
1M x 16 (16-MBIT) DYNAMIC RAM WITH FAST PAGE MODE

IS41C16105 数据手册

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®
IS41C16105  
IS41LV16105  
1M x 16 (16-MBIT) DYNAMIC RAM  
WITH FAST PAGE MODE  
ISSI  
FEBRUARY 2000  
FEATURES  
DESCRIPTION  
• TTL compatible inputs and outputs; tristate I/O  
The ISSI IS41C16105 and IS41LV16105 are 1,048,576 x  
16-bithigh-performanceCMOS DynamicRandomAccessMemo-  
ries. FastPageModeallows1,024randomaccesseswithinasingle  
row with access cycle time as short as 20 ns per 16-bit word. The  
ByteWritecontrol,ofupperandlowerbyte,makestheIS41C16105  
ideal for use in 16-, 32-bit wide data bus systems.  
• RefreshInterval:  
— 1,024 cycles/16 ms  
• Refresh Mode:  
RAS-Only, CAS-before-RAS (CBR), and Hidden  
These features make the IS41C16105 and IS41LV16105 ideally  
suitedforhigh-bandwidthgraphics,digitalsignalprocessing,high-  
performancecomputingsystems,andperipheralapplications.  
• JEDEC standard pinout  
• Single power supply:  
— 5V 10ꢀ (IS41C16105)  
— 3.3V 10ꢀ (IS41LV16105)  
The IS41C16105 and IS41LV16105 are packaged in a  
42-pin 400-mil SOJ and 400-mil 44- (50-) pin TSOP (Type II).  
• Byte Write and Byte Read operation via two CAS  
• Extended Temperature Range -30oC to 85oC  
• Industrail Temperature Range -40oC to 85oC  
KEY TIMING PARAMETERS  
Parameter  
-50  
50  
13  
25  
20  
84  
-60  
60  
Unit  
ns  
Max. RAS Access Time (tRAC)  
Max. CAS Access Time (tCAC)  
Max. Column Address Access Time (tAA)  
Min. Fast Page Mode Cycle Time (tPC)  
Min. Read/Write Cycle Time (tRC)  
15  
ns  
PIN CONFIGURATIONS  
30  
ns  
44(50)-Pin TSOP (Type II)  
42-PinSOJ  
25  
ns  
104  
ns  
VCC  
I/O0  
I/O1  
I/O2  
I/O3  
VCC  
I/O4  
I/O5  
I/O6  
I/O7  
NC  
1
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
GND  
I/O15  
I/O14  
I/O13  
I/O12  
GND  
I/O11  
I/O10  
I/O9  
VCC  
I/O0  
I/O1  
I/O2  
I/O3  
VCC  
I/O4  
I/O5  
I/O6  
I/O7  
NC  
1
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
GND  
I/O15  
I/O14  
I/O13  
I/O12  
GND  
I/O11  
I/O10  
I/O9  
I/O8  
NC  
2
2
3
3
4
4
5
5
PIN DESCRIPTIONS  
6
6
7
7
8
A0-A9  
I/O0-15  
WE  
Address Inputs  
8
9
9
10  
11  
I/O8  
Data Inputs/Outputs  
Write Enable  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
NC  
NC  
NC  
WE  
RAS  
NC  
NC  
A0  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
NC  
NC  
LCAS  
UCAS  
OE  
OE  
Output Enable  
LCAS  
UCAS  
OE  
WE  
RAS  
NC  
RAS  
UCAS  
LCAS  
Vcc  
Row Address Strobe  
A9  
A9  
Upper Column Address Strobe  
Lower Column Address Strobe  
Power  
NC  
A8  
A8  
A0  
A7  
A7  
A1  
A6  
A1  
A6  
A2  
A5  
A2  
A5  
A3  
A4  
A3  
A4  
GND  
NC  
Ground  
VCC  
GND  
VCC  
GND  
No Connection  
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any  
errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.  
Integrated Silicon Solution, Inc. — 1-800-379-4774  
1
Rev. A  
03/03/00  

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