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IR2103 PDF预览

IR2103

更新时间: 2024-01-12 17:41:22
品牌 Logo 应用领域
英飞凌 - INFINEON 驱动器
页数 文件大小 规格书
12页 121K
描述
HALF-BRIDGE DRIVER

IR2103 数据手册

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S
IR2103  
Absolute Maximum Ratings  
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-  
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured  
under board mounted and still air conditions.  
Symbol  
Definition  
High side floating absolute voltage  
High side floating supply offset voltage  
High side floating output voltage  
Low side and logic fixed supply voltage  
Low side output voltage  
Min.  
Max.  
Units  
V
-0.3  
625  
B
S
V
V
- 25  
V
B
V
B
+ 0.3  
+ 0.3  
25  
B
V
HO  
V
- 0.3  
S
V
V
CC  
-0.3  
-0.3  
-0.3  
V
V
+ 0.3  
+ 0.3  
LO  
CC  
V
Logic input voltage (HIN &  
)
V
CC  
LIN  
IN  
dV /dt  
s
Allowable offset supply voltage transient  
50  
V/ns  
P
Package power dissipation @ T +25°C (8 Lead PDIP)  
1.0  
0.625  
125  
200  
150  
150  
300  
D
A
W
(8 Lead SOIC)  
Rth  
Thermal resistance, junction to ambient  
(8 Lead PDIP)  
(8 Lead SOIC)  
JA  
°C/W  
°C  
T
T
Junction temperature  
J
Storage temperature  
-55  
S
T
Lead temperature (soldering, 10 seconds)  
L
Recommended Operating Conditions  
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the  
recommended conditions. The V offset rating is tested with all supplies biased at 15V differential.  
S
Symbol  
Definition  
High side floating supply absolute voltage  
High side floating supply offset voltage  
High side floating output voltage  
Low side and logic fixed supply voltage  
Low side output voltage  
Min.  
Max.  
Units  
V
V
S
+ 10  
V + 20  
S
B
S
V
Note 1  
600  
V
HO  
V
V
B
S
V
V
CC  
10  
0
20  
V
V
CC  
LO  
V
Logic input voltage (HIN &  
)
0
V
CC  
LIN  
IN  
°C  
T
A
Ambient temperature  
-40  
125  
Note 1: Logic operational for V of -5 to +600V. Logic state held for V of -5V to -V . (Please refer to the Design Tip  
S
S
BS  
DT97-3 for more details).  
2
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