IMP51115
DATA
C
OMMUNICATIONS
Key Features
9-Line SCSI Terminator
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Ultra-Fast response for Fast-20 SCSI applications
35MHz channel bandwidth
– 35MHz Channel Bandwidth
The IMP5115 SCSI terminator is part of IMP's family of high-perfor-
mance, adaptive, non-linear mode SCSI products, which are designed to
deliver true UltraSCSI performance in SCSI applications. The low voltage
BiCMOS architecture employed in its design offers performance superior
to older linear passive and active techniques. IMP's SCSI termination
architecture employs high-speed adaptive elements for each channel,
thereby providing the fastest response possible — typically 35MHz,
which is 100 times faster than the older linear regulator/ terminator
approach used by other manufacturers. Products using this older linear
regulator approach have bandwidths which are dominated by the output
capacitor and which are limited to 500KHz (see further discussion in the
Functional Description section). This new architecture also eliminates the
output compensation capacitor required in earlier terminator designs.
Each is approved for use with SCSI-1, -2, -3, UltraSCSI and beyond —
providing the highest performance alternative available today.
3.3V operation
Less than 3pF output capacitance
375µA Sleep-mode current
Thermally self limiting
No external compensation capacitors
Implements 8-bit or 16-bit (wide) applications
Compatible with active negation drivers
(60mA/ channel)
Compatible with passive and Active terminations
Approved for use with SCSI 1, 2, 3 and UltraSCSI
Hot swap compatible
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Pin-for-pin compatible with DS21S07A/ 2105
Another key improvement offered by the IMP5115 lies in its ability to
insure reliable, error-free communications even in systems which do not line configurability, reducing inventory and product-line
adhere to recommended SCSI hardware design guidelines, such as the diversity costs. Field configurability can also be accom-
use of improper cable lengths and impedances. Frequently, this situation plished without physically removing components which,
is not controlled by the peripheral or host designer and, when problems often times results in field returns due to mishandling.
occur, they are the first to be made aware of the problem. The IMP5115
Reduced component count is also inherent in the IMP5115
architecture is much more tolerant of marginal system integrations.
architecture. Traditional termination techniques require
Recognizing the needs of portable and configurable peripherals, the large stabilization and transient protection capacitors of up
IMP5115 has a TTL compatible sleep/ disable mode. Quiescent current to 20µF in value and size. The IMP5115 architecture does
is typically 375µA in this mode, while the output capacitance is also not require these components, allowing all the cost savings
less than 3pF. The obvious advantage of extended battery life for associated with inventory, board space, assembly, reliability,
portable systems is inherent in the product's sleep-mode feature. and component costs.
Additionally, the disable function permits factory-floor or production-
Block Diagrams
Term Power
24mA Current
Limiting Circuit
DATA OUTPUT
PIN DB (0)
Thermal
Limiting
Circuit
Current
Biasing
Circuit
2.85V
–
+
DISABLE PIN
1.4V
1 of 9 Channels
5115_01.eps
© 2000 IMP, Inc.
Data Communications
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