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IMP5218 PDF预览

IMP5218

更新时间: 2024-01-09 10:48:21
品牌 Logo 应用领域
IMP /
页数 文件大小 规格书
10页 294K
描述
9--Liine Pllug and Pllay SCSII Termiinattor

IMP5218 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:PLASTIC, TSSOP-20针数:20
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.84
Is Samacsys:N差分输出:NO
接口集成电路类型:SCSI BUS TERMINATORJESD-30 代码:R-PDSO-G20
功能数量:1信号线数量:9
端子数量:20最高工作温度:125 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
电源:3.5/5.5 V认证状态:Not Qualified
子类别:Bus Terminators最大压摆率:225 mA
最大供电电压:5.5 V最小供电电压:3.5 V
标称供电电压:4.75 V表面贴装:YES
技术:BICMOS温度等级:OTHER
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUALBase Number Matches:1

IMP5218 数据手册

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IMP5218  
DATA  
C
OMMUNICATIONS  
Key Features  
9-Line Plug and Play  
SCSI Terminator  
SCSI plug and play  
— Dual disconnect pins  
Logic LOW disconnects lines  
The 9-channel IMP5218 SCSI terminator is part of IMP's family of high-  
performance SCSI terminators that deliver true UltraSCSI performance.  
The BiCMOS design offers superior performance over first generation  
linear regulator/ resistor based terminators.  
Hot swap compatible  
Ultra-Fast response for Fast-20 SCSI applications  
35MHz channel bandwidth  
The IMP5218 has two disconnect pins for SCSI Plug and Play (PnP)  
applications.  
3.5V operation  
IMP's new architecture employs high-speed adaptive elements for each  
channel, thereby providing the fastest response possible - typically  
35MHz, which is 100 times faster than the older linear regulator termi-  
nator approach. The bandwidth of terminators based on the older  
regulator/ resistor terminator architecture is limited to 500kHz since a  
large output stabilization capacitor is required. The IMP architecture  
eliminates the external output compensation capacitor and the need  
for transient output capacitors while maintaining pin compatibility  
with first generation designs. Reduced component count is inherent  
with the IMP5218.  
Less than 3pF output capacitance  
375µA disable-mode current  
Thermally self limiting  
No external compensation capacitors  
Implements 8-bit or 16-bit (wide) applications  
Compatible with active negation drivers  
(60mA/ channel)  
Compatible with passive and active terminations  
Approved for use with SCSI 1, 2, 3 and UltraSCSI  
The IMP5218 architecture tolerates marginal system designs. A key  
improvement offered by the IMP5218 lies in its ability to insure reliable,  
error-free communications even in systems which do not adhere to rec-  
ommended SCSI hardware design guidelines, such as improper cable  
lengths and impedance. Frequently, this situation is not controlled by the  
peripheral or host designer.  
For portable and configurable peripherals, the IMP5218 can be placed in  
a sleep mode with two disconnect signals. When disabled, the quiescent  
current is typically 375µA, and the outputs are in a high impedance state.  
Block Diagrams  
Term Power  
24mA Current  
Limiting Circuit  
DATA OUTPUT  
PIN DB (0)  
Thermal  
Limiting  
Circuit  
Current  
Biasing  
Circuit  
2.85V  
DISCONNECT 1  
DISCONNECT 2  
1 of 9 Channels  
5218_01.eps  
Daily Silver IMP  
Data Communications  
1

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