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IDTQS3LR384 PDF预览

IDTQS3LR384

更新时间: 2024-11-26 20:01:35
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
5页 40K
描述
Bus Driver, 3L Series, 2-Func, 5-Bit, True Output, CMOS, PDSO24, QSOP-24

IDTQS3LR384 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:SSOP,Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.92
其他特性:TTL COMPATIBLE BUS SWITCH系列:3L
JESD-30 代码:R-PDSO-G24JESD-609代码:e0
长度:8.65 mm逻辑集成电路类型:BUS DRIVER
位数:5功能数量:2
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):0.12 ns
座面最大高度:1.75 mm最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9116 mmBase Number Matches:1

IDTQS3LR384 数据手册

 浏览型号IDTQS3LR384的Datasheet PDF文件第2页浏览型号IDTQS3LR384的Datasheet PDF文件第3页浏览型号IDTQS3LR384的Datasheet PDF文件第4页浏览型号IDTQS3LR384的Datasheet PDF文件第5页 
QUICKSWITCH® PRODUCTS  
HIGH-SPEED CMOS  
IDTQS3LR384  
10-BIT LOW POWER, LOW  
RESISTANCE BUS SWITCH  
DESCRIPTION:  
FEATURES:  
TheQS3LR384providesasetoftenhigh-speedCMOSTTL-compatible  
busswitches. Twobanksof5switchesarecontrolledbyindependentBus  
Enable(BE)signals. TheverylowRON resistance(2.5)oftheQS3LR384  
allowsinputstobeconnectedwithoutaddingpropagationdelayandwithout  
generating additional ground bounce noise.  
• Enhanced N channel FET with no inherent diode to Vcc  
• 2.5bidirectional switches connect inputs to outputs  
• Zero propagation delay, zero ground bounce  
• Ultra low power with 0.2µA typical Icc  
• Undershoot clamp diodes on all switch and control pins  
• Two enables control five bits each  
• Available in SOIC, QSOP, and TSSOP packages  
The low ON resistance of the QS3LR384 makes it ideal for PCI hot-  
plugging or hot-swapping applications.  
The QS3LR384 is characterized for operation at -40°C to +85°C.  
APPLICATIONS:  
• Hot-swapping and hot-docking (low resistance for PCI and  
Compact PCI applications)  
• Voltage translation (5V to 3.3V)  
• Power Conservation  
• Capacitance reduction and isloation  
• Bus Isolation  
• Clock Gating  
FUNCTIONALBLOCKDIAGRAM  
A0  
B0  
A4  
A5  
B4  
B5  
A9  
B9  
BEA  
BEB  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
NOVEMBER 1999  
1
c
1999 Integrated Device Technology, Inc.  
DSC-5547/1  

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