IDT74ALVC16260
INDUSTRIALTEMPERATURERANGE
3.3VCMOS12-BITTO24-BITMULTIPLEXEDD-TYPELATCH
3.3V CMOS 12-BIT TO
IDT74ALVC16260
24-BIT MULTIPLEXED
D-TYPE LATCH WITH
3-STATE OUTPUTS
DESCRIPTION:
FEATURES:
This12-bitto24-bitmultiplexedD-typelatchisbuiltusingadvanceddual
metalCMOStechnology. TheALVC16260isusedinapplicationsinwhich
twoseparatedatapathsmustbemultiplexedonto, ordemultiplexedfrom,
asingledatapath.Typicalapplicationsincludemultiplexingand/ordemultiplexing
addressanddatainformationinmicroprocessororbus-interfaceapplica-
tions. This device also is useful in memory interleaving applications.
Three 12-bit I/O ports (A1-A12, 1B1-1B12, and 2B1-2B12) are avail-
able for address and/or data transfer. The output-enable (OE2B, OE2B,
andOEA)inputscontrolthebustransceiverfunctions.TheOE2BandOE2B
controlsignalsalsoallowbankcontrolintheA-to-Bdirection.Addressand/
or data information can be stored using the internal storage latches. The
latch-enable(LE1B, LE2B, LEA1B, andLEA2B)inputsareusedtocontrol
datastorage. Whenthelatch-enableinputishigh, thelatchistransparent.
When the latch-enable input goes low, the data present at the inputs is
latched and remains latched until the latch-enable input is returned high.
The ALVC16260 has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speedperformance.
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• VCC = 2.5V ± 0.2V
• CMOS power levels (0.4µ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in SSOP, TSSOP, and TVSOP packages
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Suitable for heavy loads
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
FUNCTIONALBLOCKDIAGRAM
29
OE1B
30
A-1B
LEA1B
1B1:12
12
LATCH
2
LE1B
1B-A
12
LATCH
12
12
28
SEL
1
OEA
1
M
A1:12
U
X
12
0
12
12
2B-A
LATCH
27
12
LE2B
A-2B
LATCH
2B1:12
55
56
12
LEA2B
OE2B
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
INDUSTRIAL TEMPERATURE RANGE
MARCH 1999
1
© 1999 Integrated Device Technology, Inc.
DSC-4536/2