3.3 VOLT TIME SLOT INTERCHANGE
DIGITAL SWITCH
128 x 128
IDT72V8988
per-channelvariableorconstantthroughputdelaymodesandmicroprocessor
readandwriteaccesstoindividualchannels. Asanimportantfunctionofadigital
switchis tomaintainsequence integrityandminimize throughputdelay, the
IDT72V8988isanidealsolutionformostswitchingneeds.
FEATURES:
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128 x 128 channel non-blocking switch
Automatic signal identification (ST-BUS®, GCI)
4 RX inputs—32 channels at 64 Kbit/s per serial line
4 TX outputs—32 channels at 64 Kbit/s per serial line
Three-state serial outputs
Microprocessor Interface (8-bit data bus)
Frame Integrity for data applications
3.3V Power Supply
FUNCTIONALDESCRIPTION
Frame sequence, constantthroughputdelay, andguaranteedminimum
delayarehighpriorityrequirementsintoday’sintegrateddataandmultimedia
networks. TheIDT72V8988providesthesefunctionsonaper-channelbasis
usingastandardmicroprocessorcontrolinterface. Eachofthefourseriallines
is designed to switch 64 Kbit/s PCM or N x 64 Kbit/s data.
Available in 44-pin Plastic Leaded Chip Carrier (PLCC), and
44-pin Plastic Quad Flatpack (PQFP)
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Operating Temperature Range -40°C to +85°C
3.3V I/O with 5V Tolerant Inputs
InProcessorMode,themicroprocessorcanaccesstheinputandoutputtime
slotstocontrolotherdevicessuchasISDNtransceiversandtrunkinterfaces.
SupportingbothGCIandST-BUS® formats,IDT72V8988hasincorporatedan
internal circuit to automatically identify the polarity and format of the frame
synchronization.
AfunctionalblockdiagramoftheIDT72V8988deviceisshownonpage1.
The serial streams operate continuously at 2.048 Mb/s and are arranged in
125µswideframeseachcontaining32,8-bitchannels. Fourinput(RX0-3)and
DESCRIPTION:
TheIDT72V8988isanST-BUS®/GCIcompatibledigitalswitchcontrolled
byamicroprocessor. TheIDT72V8988canhandleasmanyas128,64Kbit/s
inputandoutputchannels. Those128channelsaredividedinto4serialinputs
andoutputs,eachofwhichconsistsof32channels.TheIDT72V8988provides
FUNCTIONALBLOCKDIAGRAM
ODE
C4i F0i
VCC GND
Timing
Unit
Output MUX
RX0
TX0
TX1
TX2
TX3
Transmit
Serial Data
Streams
Receive
Serial Data
Streams
RX1
Data
Memory
RX2
RX3
Connection
Memory
Control Register
Microprocessor Interface
5704 drw01
DS
A0/
A5
CS
R/W
D0/
D7
DTA
IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc. TheST-BUS isatrademarkofMitelCorp.
AUGUST 2003
1
2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
DSC-5704/5