IDT72V205/72V215/72V225/72V235/72V245 3.3V CMOS SyncFIFOTM
256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
PINDESCRIPTION
Symbol
Name
I/O
Datainputsforan18-bitbus.
Description
D0–D17 DataInputs
I
I
RS
Reset
WhenRSissetLOW,internalreadandwritepointersaresettothefirstlocationoftheRAMarray,FFandPAF
go HIGH, and PAE and EF go LOW. A reset is required before an initial WRITE after power-up.
WCLK
WriteClock
I
I
WhenWENisLOW,dataiswrittenintotheFIFOonaLOW-to-HIGHtransitionofWCLK,iftheFIFOisnotfull.
WhenWENis LOW,datais writtenintotheFIFOonevery LOW-to-HIGHtransitionofWCLK.When WENis
HIGH, the FIFOholds the previous data. Data willnotbe writtenintothe FIFOifthe FF is LOW.
WEN
WriteEnable
RCLK
ReadClock
ReadEnable
I
I
WhenRENisLOW,dataisreadfromtheFIFOonaLOW-to-HIGHtransitionofRCLK,iftheFIFOisnotempty.
WhenRENisLOW,dataisreadfromtheFIFOoneveryLOW-to-HIGHtransitionofRCLK. WhenRENisHIGH,
the outputregisterholds the previous data. Data willnotbe readfromthe FIFOifthe EF is LOW.
REN
OE
LD
OutputEnable
Load
I
I
WhenOEisLOW,thedataoutputbusisactive.IfOEisHIGH,theoutputdatabuswillbeinahigh-impedance
state.
WhenLDisLOW,dataontheinputsD0–D11iswrittentotheoffsetanddepthregistersontheLOW-to-HIGH
transitionoftheWCLK,whenWENisLOW.WhenLD isLOW,dataontheoutputsQ0–Q11isreadfromthe
offsetanddepthregistersontheLOW-to-HIGHtransitionoftheRCLK, whenRENisLOW.
FL
FirstLoad
I
I
Inthesingledeviceorwidthexpansionconfiguration,FLtogetherwithWXIandRXIdetermineifthemodeis
IDT Standard mode or First Word Fall Through (FWFT) mode, as well as whether the PAE/PAF flags are
synchronous or asynchronous. (See Table 1.) In the Daisy Chain Depth Expansion configuration, FL is
grounded on the first device (first load device) and set to HIGH for all other devices in the Daisy Chain.
WXI
RXI
FF/IR
WriteExpansion
Input
In thesingledeviceorwidthexpansionconfiguration,WXItogetherwithFL andRXIdetermineifthemode
isIDTStandardmodeorFWFTmode,aswellas whetherthePAE/PAFflagsaresynchronousorasynchronous.
(SeeTable1.) IntheDaisyChainDepthExpansionconfiguration,WXIisconnectedtoWXO(WriteExpansion
Out)ofthe previous device.
ReadExpansion
Input
I
Inthesingledeviceorwidthexpansionconfiguration,RXI togetherwithFL andWXI,determineifthemode
isIDTStandardmodeorFWFTmode,aswellas whetherthePAE/PAFflagsaresynchronousorasynchronous.
(SeeTable1.) IntheDaisyChainDepthExpansionconfiguration,RXIisconnectedtoRXO(ReadExpansion
Out)ofthe previous device.
Full Flag/
Input Ready
O
IntheIDTStandardmode,theFFfunctionisselected.FFindicateswhetherornottheFIFOmemoryisfull.In
theFWFTmode,theIRfunctionisselected. IRindicateswhetherornotthereisspaceavailableforwritingto
theFIFOmemory.
EF/OR
EmptyFlag/
OutputReady
O
O
IntheIDTStandardmode,theEFfunctionisselected.EFindicateswhetherornottheFIFOmemoryisempty.
InFWFTmode,theORfunctionisselected.ORindicateswhetherornotthereisvaliddataavailableattheoutputs.
WhenPAEisLOW,theFIFOisalmost-emptybasedontheoffsetprogrammedintotheFIFO.Thedefault
offsetatresetis31fromemptyforIDT72V205,63fromemptyforIDT72V215,and127fromemptyforIDT72V225/
72V235/72V245.
PAE
Programmable
Almost-EmptyFlag
PAF
Programmable
Almost-FullFlag
O
O
WhenPAFisLOW,theFIFOisalmost-fullbasedontheoffsetprogrammedintotheFIFO.Thedefaultoffsetat
resetis31fromfullforIDT72V205,63fromfullforIDT72V215,and127fromfullforIDT72V225/72V235/72V245.
WXO/HF WriteExpansion
Inthesingledeviceorwidthexpansionconfiguration,thedeviceismorethanhalffullwhenHFisLOW.Inthe
depthexpansionconfiguration,apulseissentfromWXOtoWXIofthenextdevicewhenthelastlocationinthe
FIFOiswritten.
Out/Half-FullFlag
RXO
ReadExpansion
Out
O
O
Inthe depthexpansionconfiguration, a pulse is sentfromRXO toRXI ofthe nextdevice whenthe last
locationinthe FIFOis read.
Q0–Q17 DataOutputs
Dataoutputsforan18-bitbus.
+3.3V power supply pins.
Seven ground pins.
VCC
Power
GND
Ground
3