Datasheet > ICS8MH4-622.080AJI

ICS8MH4-622.080AJI

更新时间： 2023-08-15 00:00:00

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艾迪悌 - IDT		/
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ICS8M 4

Integrated

Circuit

Systems, Inc.

Crystal Oscillator: LVPECL CLOCK

UTPUT

PRELIMINARY

PARAMETER MEASUREMENT INFORMATION (CONTINUED)

V_DD

➤

out

I_OSD

DC Input

LVDS

DC Input

100

_OD/∆ V_OD

➤

out

Differential Output Short Circuit Current Setup

Differential Output Voltage Setup

V_DD

V_D_D_D_D

out

I_OS

out

➤

DC Input

LVDS

DC Input

LVDS

I_OSB

out

V_OS/∆ V_OS

➤

Output Short Circuit Current Setup

Offset Voltage Setup

LVDS

V_DD

I_OFF

Power Off Leakage Setup

APPLICATION INFORMATION

TERMINATION FOR 3.3V LVDS DRIVER

TERMINATION FOR 2.5V LVDS DRIVER

A general LVDS interface is shown in Figure 1. In a 100W differential transmis-

sion line environment, LVDS drivers require a matched load termination of 100W

across near the receiver input. For a multiple LVDS outputs buffer, if only partial

outputs are used, it is recommended to terminate the un-used outputs.

Figure 2 shows a typical termination for LVDS driver in characteristic impedance

of 100Ωdifferential (50Ωsingle) transmission line environment. For buffer with

multiple LDVS driver, it is recommended to terminate the unused outputs.

3.3V

2.5V

3.3V

2.5V

LVDS Driver

LVDS

LVDS Driver

LVDS

100

100Ω Differential Transmission Line

100 Ohm Differential Transmission Line

100Ω Differential Transmission Line

100 Ohm Differential Transmission Line

Figure 1: Typical 3.3V LVDS Driver Termination

Figure 2: Typical 3.3V LVDS Driver Termination

ICS8Mx4 Datasheet Rev A

3 of 4

Revised 30Nov2004

Integrated Circuit Systems, Inc. ● Networking & Communications ● www.icst.com ● tel (508) 852-5400

1 234

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