Datasheet > ICS1893CY-10LFT

ICS1893CY-10LFT

更新时间： 2024-01-17 07:46:44

品牌	Logo	应用领域
艾迪悌 - IDT		电信电信集成电路
页数	文件大小	规格书
143页	1040K
描述
Interface Circuit, CMOS, PQFP64, 10 X 10 MM, LEAD FREE, TQFP-64

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中文翻译

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技术参数
数据手册

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ICS1893CY-10LFT 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	TFQFP,	针数：	64
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.71
JESD-30 代码：	S-PQFP-G64	JESD-609代码：	e3
长度：	10 mm	功能数量：	1
端子数量：	64	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	TFQFP	封装形状：	SQUARE
封装形式：	FLATPACK, THIN PROFILE, FINE PITCH	峰值回流温度（摄氏度）：	260
认证状态：	Not Qualified	座面最大高度：	1.2 mm
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	电信集成电路类型：	INTERFACE CIRCUIT
温度等级：	COMMERCIAL	端子面层：	MATTE TIN
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	30
宽度：	10 mm	Base Number Matches：	1

ICS1893CY-10LFT 数据手册

Integrated Device Technology, Inc.

Document Type: Data Sheet

ICS1893CY-10

Document Stage: Preliminary Release

3.3-V 10Base-T/100Base-TX Integrated PHYceiver™

General

Features

The ICS1893CY-10 is a low-power, physical-layer device

(PHY) that supports the ISO/IEC 10Base-T and 100Base-TX

Carrier-Sense Multiple Access/Collision Detection

(CSMA/CD) Ethernet standards. The ICS1893CY-10

supports managed or unmanaged node, repeater, and

switch applications.

• Supports category 5 cables with attenuation in excess of

24 dB at 100 MHz

• Fully integrated, DSP-based PMD includes:

– Adaptive equalization and baseline wander correction

– Transmit wave shaping and stream cipher scrambler

– MLT-3 encoder and NRZ/NRZI encoder

• Low-power, 0.35-micron CMOS (typically 400 mW)

• Power-down mode typically 21mW

• Single 3.3-V power supply.

The ICS1893CY-10 is intended for MII, Node applications

that require the Auto-MIDIX feature that automatically

corrects crossover errors in plant wiring.

• Single-chip, fully integrated PHY provides PCS, PMA,

PMD, and AUTONEG sublayers of IEEE standard

The ICS1893CY-10 incorporates digital signal processing

(DSP) in its Physical Medium Dependent (PMD) sublayer.

As a result, it can transmit and receive data on unshielded

twisted-pair (UTP) category 5 cables with attenuation in

excess of 24 dB at 100 MHz. With this ICS-patented

technology, the ICS1893CY-10 can virtually eliminate errors

from killer packets.

• 10Base-T and 100Base-TX IEEE 802.3 compliant

• Highly configurable design supports:

– Node, repeater, and switch applications

– Managed and unmanaged applications

– 10M or 100M half- and full-duplex modes

– Parallel detection

– Auto-negotiation, with Next Page capabilities

– Auto-MDI/MDIX crossover correction

The ICS1893CY-10 provides a Serial Management Interface

for exchanging command and status information with a

Station Management (STA) entity.

• MAC/Repeater Interface can be configured as:

– 10M or 100M Media Independent Interface

– 100M Symbol Interface (bypasses the PCS)

– 10M 7-wire Serial Interface

The ICS1893CY-10 Media Dependent Interface (MDI) can

be configured to provide either half- or full-duplex operation

at data rates of 10 MHz or 100 MHz. The MDI configuration

can be established manually (with input pins or control

Auto-Negotiation features). When the ICS1893CY-10

Auto-Negotiation sublayer is enabled, it exchanges

technology capability data with its remote link partner and

automatically selects the highest-performance operating

mode they have in common.

• Clock and crystal supported

• Small Footprint 64-pin Thin Quad Flat Pack (TQFP)

• Available in Industrial Temperature and Lead-Free

ICS1893CY-10 Block Diagram

100Base-T

PCS

•

Frame

CRS/COL

Detection

10/100 MII or

Alternate

MAC/Repeater

Interface

Twisted-

Pair

Interface to

Magnetics

Modules and

RJ45

Interface

MUX

Integrated

Switch

•

Parallel to Serial

4B/5B

10Base-T

Connector

MII

Low-Jitter

Clock

Synthesizer

Auto-

Negotiation

Configuration

and Status

Extended

Set

MII Serial

Management

Interface

Clock

Power

LEDs and PHY

Address

IDT reserves the right to make changes in the device data identified in

this publication without further notice. IDT advises its customers to

obtain the latest version of all device data to verify that any information

being relied upon by the customer is current and accurate.

ICS1893CY-10

Rev 1/07

12 3 4 5 6 7...143

中文翻译

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与ICS1893CY-10LFT相关器件

型号	品牌	获取价格	描述	数据表
ICS1893CYI-10	ICSI	获取价格	3.3-V 10Base-T/100Base-TX Integrated PHYceiver
ICS1893CYI-10LF	ICSI	获取价格	3.3-V 10Base-T/100Base-TX Integrated PHYceiver
ICS1893Y-10	ICSI	获取价格	3.3V 10Base-T/100Base-TX Integrated PHYceiverTM
ICS1893YI-10	ICSI	获取价格	3.3-V 10Base-T/100Base-TX Integrated PHYceive
ICS1893YI-10LF	IDT	获取价格	Interface Circuit, CMOS, PQFP64, 10 X 10 MM, LEAD FREE, TQFP-64
ICS1894-32	IDT	获取价格	10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
ICS1894-32_1	IDT	获取价格	10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
ICS1894-32_10	IDT	获取价格	10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
ICS1894-40	IDT	获取价格	10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
ICS1894-40_10	IDT	获取价格	10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE

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