Datasheet > HY57V164010DTC-10S

HY57V164010DTC-10S

更新时间： 2024-02-25 04:07:52

品牌	Logo	应用领域
其他 - ETC		内存集成电路光电二极管动态存储器时钟
页数	文件大小	规格书
11页	149K
描述
x4 SDRAM

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HY57V164010D

2 Banks x 2M x 4 Bit Synchronous DRAM

DESCRIPTION

The Hyundai HY57V164010D is a 16,777,216-bits CMOS Synchronous DRAM, ideally suited for the main memory

applications which require large memory density and high bandwidth. HY57V164010D is organized as 2banks of

2,097,152x4.

HY57V164010D is offering fully synchronous operation referenced to a positive edge clock. All inputs and outputs are

synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high band-

width. All input and output voltage levels are compatible with LVTTL.

Programmable options include the length of pipeline (Read latency of 1,2 or 3), the number of consecutive read or

write cycles initiated by a single control command (Burst length of 1,2,4,8 or full page), and the burst count

sequence(sequential or interleave). A burst of read or write cycles in progress can be terminated by a burst terminate

command or can be interrupted and replaced by a new burst read or write command on any cycle. (This pipeline

design is not restricted by a `2N` rule.)

FEATURES

•

Single 3.3V ± 0.3V power supply

•

Auto refresh and self refresh

All device pins are compatible with LVTTL interface

4096 refresh cycles / 64ms

JEDEC standard 400mil 44pin TSOP-II with 0.8mm

of pin pitch

Programmable Burst Length and Burst Type

- 1, 2, 4, 8 and Full Page for Sequence Burst

- 1, 2, 4 and 8 for Interleave Burst

•

All inputs and outputs referenced to positive edge of

system clock

•

Programmable CAS Latency ; 1, 2, 3 Clocks

•

Data mask function by DQM

Internal two banks operation

ORDERING INFORMATION

Part No.

Clock Frequency

Organization

Interface

Package

HY57V164010DTC-8

HY57V164010DTC-10P

HY57V164010DTC-10S

HY57V164010DTC-10

125MHz

100MHz

400mil

44pin TSOP II

2Banks x 2Mbits x 4

LVTTL

This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any

responsibility for use of circuits described. No patent licenses are implied

Rev. 1.5/Dec.98

12 3 4 5 6 7...11

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