32-Bit Arm® Cortex®-M0+ MCU
HT32F52344/HT32F52354
List of Figures
Figure 1. Block Diagram ......................................................................................................................... 17
Figure 2. Memory Map............................................................................................................................ 18
Figure 3. Clock Structure........................................................................................................................ 21
Figure 4. 33-pin QFN Pin Assignment .................................................................................................... 22
Figure 5. 46-pin QFN Pin Assignment .................................................................................................... 23
Figure 6. 48-pin LQFP Pin Assignment................................................................................................... 24
Figure 7. 64-pin LQFP Pin Assignment................................................................................................... 25
Figure 8. ADC Sampling Network Model ................................................................................................ 39
Figure 9. I2C Timing Diagram.................................................................................................................. 41
Figure 10. SPI Timing Diagram – SPI Master Mode............................................................................... 43
Figure 11. SPI Timing Diagram – SPI Slave Mode with CPHA=1........................................................... 44
Figure 12. USB Signal Rise Time and Fall Time and Cross-Point Voltage (VCRS) Definition .................. 45
Rev. 1.10
5 of 51
August 03, 2020