HT24LC64
Absolute Maximum Ratings
Operating Temperature (Commercial) ........................................................................................................ 0°C to 70°C
Storage Temperature ............................................................................................................................ -50°C to 125°C
Applied VCC Voltage with Respect to VSS .................................................................................VSS -0.3V to VSS+6.0V
Applied Voltage on any Pin with Respect to VSS ................................................................................................VSS -0.3V to VCC+0.3V
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-
ity.
D.C. Characteristics
Ta=0°C to 70°C
Test Conditions
Conditions
Symbol
Parameter
Min.
Typ.
Max.
Unit
VCC
VCC
ICC1
ICC2
VIL
Operating Voltage
2.4
5.5
V
mA
mA
V
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
Operating Current
5V Read at 100kHz
5V Write at 100kHz
2
5
¾
¾
Operating Current
0.3VCC
Input Low Voltage
¾
¾
¾
¾
-1
VIH
0.7VCC
V
CC+0.5
Input High Voltage
V
VOL
ILI
IOL=2.1mA
Output Low Voltage
Input Leakage Current
Output Leakage Current
Standby Current
2.4V
5V
0.4
1
V
¾
¾
¾
¾
¾
¾
¾
VIN=0 or VCC
VOUT=0 or VCC
VIN=0 or VCC
VIN=0 or VCC
f=1MHz 25°C
f=1MHz 25°C
mA
mA
mA
mA
pF
pF
ILO
5V
1
ISTB1
ISTB2
CIN
5V
5
Standby Current
2.4V
¾
4
Input Capacitance (See Note)
Output Capacitance (See Note)
6
COUT
8
¾
Note: These parameters are periodically sampled but not 100% tested.
A.C. Characteristics
Ta=0°C to 70°C
Standard Mode*
V
CC=5V±10%
Symbol
Parameter
Clock Frequency
Remark
Unit
Min.
¾
Max.
100
¾
Min.
Max.
400
¾
fSK
tHIGH
tLOW
tR
kHz
ns
¾
¾
¾
¾
600
1200
¾
Clock High Time
4000
4700
¾
Clock Low Time
ns
¾
¾
SDA and SCL Rise Time
SDA and SCL Fall Time
Note
Note
1000
300
300
300
ns
tF
ns
¾
¾
After this period, the first
clock pulse is generated.
tHD:STA
START Condition Hold Time
START Condition Setup Time
4000
4000
600
600
ns
ns
¾
¾
¾
¾
Only relevant for repeated
START condition.
tSU:STA
tHD:DAT
tSU:DAT
tSU:STO
tAA
Data Input Hold Time
0
0
ns
ns
ns
ns
¾
¾
¾
¾
¾
¾
¾
¾
Data Input Setup Time
STOP Condition Setup Time
Output Valid from Clock
200
4000
¾
100
600
¾
¾
¾
3500
900
Rev. 1.00
2
January 5, 2005