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HS9-26CLV32EH-Q PDF预览

HS9-26CLV32EH-Q

更新时间： 2024-01-07 00:56:07
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
3页 217K
描述
Radiation Hardened 3.3V Quad Differential Line Receiver

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HS9-26CLV32EH-Q 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Transferred零件包装代码：DFP
包装说明：DFP,针数：16
Reach Compliance Code：compliantECCN代码：USML XV(E)
HTS代码：8542.39.00.01风险等级：5.2
Is Samacsys：N输入特性：DIFFERENTIAL SCHMITT TRIGGER
接口集成电路类型：LINE RECEIVER接口标准：EIA-422
JESD-30 代码：R-CDFP-F16JESD-609代码：e4
功能数量：4端子数量：16
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：CERAMIC, METAL-SEALED COFIRED封装代码：DFP
封装形状：RECTANGULAR封装形式：FLATPACK
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
接收器位数：4座面最大高度：2.92 mm
最大供电电压：3.6 V最小供电电压：3 V
标称供电电压：3.3 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：Gold (Au)端子形式：FLAT
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED总剂量：300k Rad(Si) V
宽度：6.73 mmBase Number Matches：1

HS9-26CLV32EH-Q 数据手册

 浏览型号HS9-26CLV32EH-Q的Datasheet PDF文件第1页浏览型号HS9-26CLV32EH-Q的Datasheet PDF文件第2页 
HS-26CLV32RH, HS-26CLV32EH  
Die Characteristics  
DIE DIMENSIONS:  
Metallization:  
78 mils x 123 mils x 21 mils  
(1970µm x 3120µm)  
Bottom: Mo/TiW  
Thickness: 5800Å ±1kÅ  
Top: Al/Si/Cu  
INTERFACE MATERIALS:  
Glassivation:  
Thickness: 10kÅ ±1kÅ  
Worst Case Current Density:  
Type: PSG (Phosphorus Silicon Glass)  
Thickness: 8kÅ ±1kÅ  
5
2
<2.0 x 10 A/cm  
Bond Pad Size:  
Substrate:  
AVLSI1RA, Silicon backside, V  
110µm x 100µm  
backside potential  
DD  
Metallization Mask Layout  
HS-26CLV32RH, HS-26CLV32EH  
TABLE 1. HS-26CLV32RH, HS-26CLV32EH PAD COORDINATES  
RELATIVE TO PIN 1  
AIN  
(1)  
V
(16)  
BIN  
(15)  
DD  
PIN  
PAD  
NUMBER  
NAME  
X COORDINATES Y COORDINATES  
1
2
AIN  
AIN  
0
0
-337.1  
-337.1  
-337.1  
-337.1  
-337.1  
0
-362  
(14) B  
IN  
AIN (2)  
3
A
-912.5  
-1319.3  
-1774.4  
-2233.7  
-2595.7  
-2596.7  
-2595.7  
-2233.7  
-1774.4  
-1319.3  
-898.4  
-362  
OUT  
4
ENABLE  
5
C
OUT  
6
CIN  
CIN  
(13) B  
OUT  
7
A
(3)  
OUT  
8
GND  
DIN  
DIN  
418.4  
776.4  
1113.5  
1113.5  
1113.5  
1113.5  
1113.5  
776.4  
420.2  
9
10  
11  
12  
13  
14  
15  
16  
ENAB (4)  
(12) ENAB  
D
OUT  
ENABLE  
B
OUT  
(11) D  
OUT  
C
(5)  
(6)  
OUT  
BIN  
BIN  
0
VDD  
1
(10) D  
IN  
C
NOTE: Dimensions in microns  
IN  
(7)  
(8)  
(9)  
CIN  
GND  
DIN  
For additional products, see www.intersil.com/product_tree  
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted  
in the quality certifications found at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time  
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be  
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third  
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN4907.4  
January 8, 2013  
3
123

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