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HS574AC PDF预览

HS574AC

更新时间: 2024-01-14 07:50:59
品牌 Logo 应用领域
西伯斯 - SIPEX 转换器模数转换器
页数 文件大小 规格书
14页 208K
描述
12-Bit Sampling A/D Converters

HS574AC 技术参数

生命周期:Obsolete包装说明:LCC-28
Reach Compliance Code:unknown风险等级:5.56
Is Samacsys:N最大模拟输入电压:16.5 V
最小模拟输入电压:-16.5 V最长转换时间:25 µs
转换器类型:ADC, SUCCESSIVE APPROXIMATIONJESD-30 代码:S-CQCC-N28
长度:11.43 mm最大线性误差 (EL):0.012%
位数:12功能数量:1
端子数量:28最高工作温度:125 °C
最低工作温度:-55 °C输出位码:BINARY, OFFSET BINARY
输出格式:PARALLEL, WORD封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QCCN封装形状:SQUARE
封装形式:CHIP CARRIER认证状态:Not Qualified
座面最大高度:2.29 mm标称供电电压:15 V
表面贴装:YES温度等级:MILITARY
端子形式:NO LEAD端子节距:1.27 mm
端子位置:QUAD宽度:11.43 mm
Base Number Matches:1

HS574AC 数据手册

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CE  
dv  
dt  
V  
ERROR = t  
R/C  
t
(ACQ)  
SAMPLE  
POINT  
ACQUISITION  
TIME  
VERROR  
WAIT FOR  
CONVERT SIGNAL  
WAIT FOR  
BUS READ  
CONVERSION  
t  
V
IN  
ACQUISITION TIME =  
APERTURE DELAY TIME =  
CDAC VOLTAGE  
0 VOLTS  
0.12 x t  
CONVERT  
Figure 1. Aperture Uncertainty  
Figure 3. Sample–and–Hold Function  
acquisition of the input by the CDAC (this time  
is defined as tACQ). Following these two cycles,  
the input sample is taken and held. The A/D  
conversion follows this cycle with the duration  
controlled by the internal clock cycle, which is  
determined by the specific product model. Note  
that because the sample is taken relative to the  
R/C transition, tACQ is also the traditional “aper-  
ture delay” of this internal sample and hold.  
the input which will upset the buffer output and  
may add error to the conversion itself.  
Furthermore, the isolation of the input after the  
acquisition time in the HS574A/SP674A allows  
the user an opportunity to release the hold on an  
external sample-and-hold and start it tracking  
the next sample. This will increase system  
throughput with the user's existing components.  
Since  
t
is measured in clock cycles, its  
durationACwQill vary with the internal clock  
When using an external S/H, the HS574A/  
SP674A acts as any other 574–type device be-  
causetheinternalS/Histransparent.Thesample/  
hold function in the HS574A/SP674A is inher-  
enttothecapacitorDACstructure, anditstiming  
characteristics are determined by the internally  
generated clock. However, for multiplexer op-  
eration, the internal S/H may eliminate the need  
for an external S/H. The operation of the S/H  
function is internal to the HS574A/SP674A and  
iscontrolledthroughthenormalR/Ccontrolline  
(refer to Figure 3). When the R/C line makes a  
negative transition, the HS574A/SP674A starts  
the timing of the sampling and conversion. The  
first two clock cycles are allocated to signal  
frequency. This results in T  
= 2.9µ sec  
±1.1µsecsbetweenunitsandovAeCrQtemperatures.  
Offset, gain and linearity errors of the S/H cir-  
cuit, as well as the effects of its droop rate, are  
included in the overall specs for the HS574A/  
SP674A.  
USING THE SPX74A SERIES  
Typical Interface Circuit  
The HS574A/SP674A is a complete A/D con-  
verter that is fully operational when powered up  
and issued a Start Convert Signal. Only a few  
external components are necessary. Figure 4  
depicts a typical interface circuit for operating  
the HS574A/SP674A in a unipolar input mode.  
Figure 5 depicts a typical interface circuit for  
operating the HS574A/SP674A in a bipolar in-  
put mode. Further information is given in the  
followingsectionsontheseconnections,butfirst  
a few considerations concerning board layout to  
achieve the best operation.  
25pF  
REQ = 4Kat any range.  
T = REQ x CEQ = 100ns.  
For each application of this device, strict atten-  
tion must be given to power supply decoupling,  
board layout (to reduce pickup between analog  
Figure 2. Equivalent SP574A Input Circuit  
8

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