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HS-82C37ARH_00 PDF预览

HS-82C37ARH_00

更新时间: 2024-10-02 04:22:15
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英特矽尔 - INTERSIL 控制器
页数 文件大小 规格书
21页 269K
描述
Radiation Hardened CMOS High Performance Programmable DMA Controller

HS-82C37ARH_00 数据手册

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HS-82C37ARH  
TM  
Data Sheet  
August 2000  
File Number 3042.2  
Radiation Hardened CMOS High  
Performance Programmable DMA  
Controller  
Features  
• Electrically Screened to SMD # 5962-95821  
• QML Qualified per MIL-PRF-38535 Requirements  
The Intersil HS-82C37ARH is an enhanced, radiation  
hardened CMOS version of the industry standard 8237A  
Direct Memory Access (DMA) controller, fabricated using the  
Intersil hardened field, self-aligned silicon gate CMOS  
process. The HS-82C37ARH offers increased functionality,  
improved performance, and dramatically reduced power  
consumption for the radiation environment. The high speed,  
radiation hardness, and industry standard configuration of  
the HS-82C37ARH make it compatible with radiation  
hardened microprocessors such as the HS-80C85RH and  
the HS-80C86RH.  
• Radiation Performance  
- Total Dose. . . . . . . . . . . . . . . . . . . . . 100 krad(Si) (Max)  
8
- Transient Upset. . . . . . . . . . . . . . . . . . . . .>10 rad(Si)/s  
- Latch Up Free EPI-CMOS  
• Low Power Consumption  
- IDDSB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50µA (Max)  
- IDDOP . . . . . . . . . . . . . . . . . . . . . . . 4.0mA/MHz (Max)  
• Pin Compatible with NMOS 8237A and the Intersil  
82C37A  
• High Speed Data Transfers Up To 2.5MBPS With 5MHz  
Clock  
The HS-82C37ARH can improve system performance by  
allowing external devices to transfer data directly to or from  
system memory. Memory-to-memory transfer capability is  
also provided, along with a memory block initialization  
feature. DMA requests may be generated by either hardware  
or software, and each channel is independently  
programmable with a variety of features for flexible  
operation.  
• Four Independent Maskable Channels with  
Autoinitialization Capability  
• Expandable to Any Number of Channels  
• Memory-to-Memory Transfer Capability  
• CMOS Compatible  
Static CMOS circuit design insures low operating power and  
allows gated clock operation for an even further reduction of  
power. Multimode programmability allows the user to select  
from three basic types of DMA services, and reconfiguration  
under program control is possible even with the clock to the  
controller stopped. Each channel has a full 64K address and  
word count range, and may be programmed to autoinitialize  
these registers following DMA termination (end of process).  
The Intersil hardened field CMOS process results in  
performance equal to or greater than existing radiation  
resistant products at a fraction of the power.  
• Hardened Field, Self-Aligned, Junction Isolated CMOS  
Process  
• Single 5V Supply  
o
o
• Military Temperature Range . . . . . . . . . . . -55 C to 125 C  
Ordering Information  
INTERNAL  
MKT. NUMBER  
TEMP. RANGE  
o
ORDERING NUMBER  
5962R9582101QQC  
5962R9582101QXC  
5962R9582101VQC  
5962R9582101VXC  
( C)  
HS1-82C37ARH-8  
HS9-82C37ARH-8  
HS1-82C37ARH-Q  
HS9-82C37ARH-Q  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
Specifications for Rad Hard QML devices are controlled  
by the Defense Supply Center in Columbus (DSCC). The  
SMD numbers listed here must be used when ordering.  
Detailed Electrical Specifications for these devices are  
contained in SMD 5962-95821. A “hot-link” is provided  
on our homepage for downloading.  
www.intersil.com/spacedefense/space.asp  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000  
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