Datasheet > HMD8M32F4-6

HMD8M32F4-6

更新时间： 2024-02-15 18:42:55

品牌	Logo	应用领域
HANBIT		动态存储器
页数	文件大小	规格书
6页	63K
描述
DRAM

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技术参数
数据手册

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HMD8M32F4-6 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.75
Base Number Matches：	1

HMD8M32F4-6 数据手册

HANBit

HMD8M32F4E

Read command set-up time

t_RCS

t_RCH

t_RRH

t_WCH

t_WCR

t_WP

Read command hold referenced to /CAS

Read command hold referenced to /RAS

Write command hold time

Write command hold referenced to /RAS

Write command pulse width

Write command to /RAS lead time

Write command to /CAS lead time

Data-in set-up time

t_RWL

t_CWL

t_DS

Data-in hold time

t_DH

Refresh period

t_REF

t_WCS

t_CSR

t_CHR

t_RPC

t_CPA

t_CP

Write command set-up time

/CAS setup time (C-B-R refresh)

/CAS hold time (C-B-R refresh)

/RAS precharge to /CAS hold time

Access time from /CAS precharge

/CAS precharge time (Fast page)

/RAS pulse width (Fast page )

/WE to /RAS precharge time (C-B-R refresh)

/WE to /RAS hold time (C-B-R refresh)

t_RASP

t_WRP

t_WRH

200K

NOTES

1. An initial pause of 200ms is required after power-up followed by any 8 /RAS-only or /CAS-before-/RAS refresh

cycles before proper device operation is achieved.

2. V_{IH (min)}and V_{IL (max)}are reference levels for measuring timing of input signals. Transition times are measured

between V_IH(min)and V_IL(max)and are assumed to be 5ns for all inputs.

3. Measured with a load equivalent to 1TTL loads and 100pF

4. Operation within the t_RCD(max)limit insures that t_RAC(max)can be met. t_RCD(max)is specified as a reference point

only. If t_RCDis greater than the specified t_RCD(max)limit, then access time is controlled exclusively by t_CAC

5. Assumes that t_RCD³ t_RCD(max)

6. t_AR, t_WCR, t_DHRare referenced to t_RAD(max)

7. This parameter defines the time at which the output achieves the open circuit condition and is not referenced to

V_OHor V_OL

8. t_WCS, t_RWD, t_CWDand t_AWDare non restrictive operating parameter.

They are included in the data sheet as electrical characteristic only. If t_WCS

_tWCS(min)the cycle is an early write

cycle and the data out pin will remain high impedance for the duration of the cycle.

9. Either t_RCHor t_RRHmust be satisfied for a read cycle.

10. These parameters are referenced to the /CAS leading edge in early write cycles and to the /W leading edge in read-

write cycles.

11. Operation within the t_RAD(max)limit insures that t_RAC(max)can be met. t_RAD(max)is specified as a reference

point only. If t_RADis greater than the specified t_RAD(max)limit. then access time is controlled by t_AA

URL:www.hbe.co.kr

REV.1.0.(August.2002)

- 5 -

HANBit Electronics Co.,Ltd.

1 2 3 456

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