HANBit
HMD8M32F4E
IIL : Input Leakage Current (Any input 0V £ VIN £ 6.5V, all other pins not under test = 0V)
IOL : Output Leakage Current (Data out is disabled, 0V £ VOUT £ 5.5V
VOH : Output High Voltage Level (IOH= -5mA )
VOL : Output Low Voltage Level (IOL = 4.2mA )
* NOTE: ICC1, ICC3, ICC4 and ICC6 are dependent on output loading and cycle rates. Specified values are obtained with
the output open. ICC is specified as an average current. In ICC1 and ICC3, address cad be changed maximum
once while /RAS=VIL. In ICC4, address can be changed maximum once within one page mode cycle.
CAPACITANCE ( TA=25oC, Vcc = 5V, f = 1Mz )
DESCRIPTION
Input Capacitance (A0-A11)
SYMBOL
MIN
MAX
UNITS
CIN1
C IN2
CIN3
CIN4
CDQ1
-
-
-
-
-
100
130
40
pF
pF
pF
pF
pF
Input Capacitance (/WE)
Input Capacitance (/RAS0-/RAS3)
Input Capacitance (/CAS0-/CAS3)
Input/Output Capacitance (DQ0-31)
30
20
o
o
AC CHARACTERISTICS ( 0 C £ TA £ 70 C , Vcc = 5V±10%, See notes 1,2.)
-5
-6
STANDARD OPERATION
SYMBOL
UNIT
MIN
MAX
MIN
MAX
Random read or write cycle time
Access time from /RAS
Access time from /CAS
Access time from column address
/CAS to output in Low-Z
Output buffer turn-off delay
Transition time (rise and fall)
/RAS precharge time
tRC
tRAC
tCAC
tAA
90
110
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
50
13
25
60
15
30
tCLZ
tOFF
tT
3
3
3
3
2
13
50
13
50
2
tRP
30
50
13
38
8
40
/RAS pulse width
tRAS
tRSH
tCSH
tCAS
tRCD
tRAD
tCRP
tASR
tRAH
tASC
tCAH
tRAL
- 4 -
10K
60
10K
15
/RAS hold time
/CAS hold time
45
/CAS pulse width
10K
37
10
20
15
5
10K
45
/RAS to /CAS delay time
/RAS to column address delay time
/CAS to /RAS precharge time
Row address set-up time
Row address hold time
20
15
5
25
30
0
0
10
0
10
0
Column address set-up time
Column address hold time
Column Address to /RAS lead time
8
10
30
25
URL:www.hbe.co.kr
REV.1.0.(August.2002)
HANBit Electronics Co.,Ltd.