Datasheet > HMC525A-Die

HMC525A-Die

更新时间： 2023-12-20 18:44:11

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
27页	574K
描述
4GHz至8.5 GHz宽带I/Q混频器

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HMC525A-Die 数据手册

Data Sheet

HMC525ACHIPS

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

NC NC NC

GND

HMC525ACHIPS

GND

(TOP VIEW)

Not to Scale

GND

12 11 10

IF1 IF2 GND

NOTES

1. NC = NO CONNECT.

Figure 2. Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

1, 3, 7, 9, 10

Mnemonic Description

GND

Ground. The GND pads must be connected to RF and dc ground. See Figure 3 for the interface schematic.

Radio Frequency Input and Output. The RF pad is dc-coupled and matched to 50 Ω when LO is on. See Figure 4

for the interface schematic.

4, 5, 6

No Connect.

Local Oscillator Input. The LO pad is dc-coupled and matched to 50 Ω when LO is on. See Figure 5 for the

interface schematic.

11, 12

IF2, IF1

First and Second Quadrature Intermediate Frequency Input and Output Pads. The IFx pads are dc-coupled. For

applications not requiring operation to dc, use an off-chip dc blocking capacitor. For operations to dc, the IFx

pads must not source or sink more than 3 mA of current. Otherwise, the device may not function and may fail.

See Figure 6 for the interface schematic.

INTERFACE SCHEMATICS

GND

Figure 3. GND Interface Schematic

Figure 5. LO Interface Schematic

IF1, IF2

Figure 4. RF Interface Schematic

Figure 6. IF1, IF2 Interface Schematic

Rev. 0 | Page 5 of 27

1 2 3 456 7 8...27

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