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HMC424A PDF预览

HMC424A

更新时间: 2024-01-30 03:06:26
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
11页 285K
描述
0.1 GHz to 13.0 GHz,0.5 dB LSB, 6-Bit, GaAs Digital Attenuator

HMC424A 数据手册

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Data Sheet  
HMC424ACHIPS  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
2
HMC424ACHIPS  
TOP VIEW  
(Not to Scale)  
1
3
RF2  
RF1  
9
8
7
6
5
4
Figure 3. Pin Configuration  
Table 4. Pin Function Descriptions  
Pad No. Mnemonic Description  
1
RF1  
Attenuator RF Input. This pin is dc-coupled and ac matched to 50 Ω. An external dc blocking capacitor is required if  
the RF line potential is not equal to 0 V.  
2
3
VEE  
RF2  
Power Supply.  
Attenuator RF Output. This pin is dc-coupled and ac matched to 50 Ω. An external dc blocking capacitor is  
required if the RF line potential is not equal to 0 V.  
4 to 9  
V1 to V6  
Parallel Control Voltage Inputs. These pins select the required attenuation (see Table 5). There is an internal pull-  
down resistor on these pins to VEE.  
INTERFACE SCHEMATICS  
VEE  
3pF  
2kΩ  
RF1, RF2  
Figure 4. RF1 and RF2 Interface Schematic  
Figure 6. VEE Interface Schematic  
100kΩ  
V1 TO V6  
VEE  
Figure 5. V1 to V6 Interface Schematic  
Rev. B | Page 5 of 11  
 
 

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