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HM065788N-2 PDF预览

HM065788N-2

更新时间: 2024-09-30 21:12:47
品牌 Logo 应用领域
TEMIC 静态存储器内存集成电路
页数 文件大小 规格书
9页 106K
描述
Standard SRAM, 16KX4, 55ns, CMOS,

HM065788N-2 技术参数

生命周期:TransferredReach Compliance Code:unknown
风险等级:5.66最长访问时间:55 ns
I/O 类型:COMMONJESD-30 代码:R-XUUC-N22
内存密度:65536 bit内存集成电路类型:STANDARD SRAM
内存宽度:4功能数量:1
端口数量:1端子数量:22
字数:16384 words字数代码:16000
工作模式:ASYNCHRONOUS最高工作温度:125 °C
最低工作温度:-55 °C组织:16KX4
输出特性:3-STATE可输出:NO
封装主体材料:UNSPECIFIED封装代码:DIE
封装等效代码:DIE OR CHIP封装形状:RECTANGULAR
封装形式:UNCASED CHIP并行/串行:PARALLEL
电源:5 V认证状态:Not Qualified
最大待机电流:0.02 A最小待机电流:4.5 V
子类别:SRAMs最大压摆率:0.07 mA
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:NO LEAD端子位置:UPPER
Base Number Matches:1

HM065788N-2 数据手册

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MATRA MHS  
HM 65788  
16 K × 4 High Speed CMOS SRAM  
Introduction  
The HM 65788 is a high speed CMOS static RAM Easy memory expansion is provided by an active low chip  
organized as 16384 × 4 bits. It is manufactured using select (CS) and three state drivers.  
MHS’s high performance CMOS technology.  
All inputs and outputs of the HM 65788 are TTL  
Access times as fast as 15 ns are available with maximum compatible and operate from single 5 V supply thus  
power consumption of only 633 mW.  
simplifying system design.  
The HM 65788 features fully static operation requiring no The HM 65788 is 100 % processed following the test  
external clocks or timing strobes. The automatic methods of MIL STD 883 and/or ESA/SCC 9000 making  
power-down feature reduces the power consumption by it ideally suitable for military/space applications that  
60 % when the circuit is deselected.  
demand superior levels of performance and reliability.  
Features  
D Fast access time  
D 300 mils width package  
D TTL compatible inputs and outputs  
D Asynchronous  
Commercial : 15/20/25/35/45 ns  
Industrial/military : 20/25/35/45/55 ns  
D Low power consumption  
Active : 267 mW (typ)  
D Capable of withstanding greater than 2000 V electrostatic  
discharge  
Standby : 75 mW (typ)  
D Single 5 volt supply  
D Wide temperature range :  
–55°C to + 125°C  
Interface  
Block Diagram  
Rev. C (16/12/94)  
1

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