HG24C02/04/08/16
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition whichmust precede any
other command (see to Figure 2 on page 5).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence,
the stop command will place the EEPROM in a standby power mode (see Figure 2 onpage 5).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROMin 8-bit
words. The EEPROM sends a "0" to acknowledge that it has received each word. This happens during the
ninth clock cycle.
STANDBY MODE: The HG24C02 / HG24C04 / HG24C08 / HG24C16 features a low-power standbymode
which is enabled: (a) upon power-up and (b) after the receipt of the STOP bit and the
completion of any internal operations.
MEMORY RESET: After an interruption in protocol, power loss or system reset, any two-wire partcan
be reset by following these steps:
1. Clock up to 9 cycles.
2. Look for SDA high in each cycle while SCL is high.
3. Create a start condition.
Figure 1: Data Validity
Figure 2: Start and Stop Definition
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2019 OCT
5 / 14