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HD74AC4024

更新时间： 2024-09-24 22:53:11

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HD74AC4024 数据手册

HD74AC4024

7-State Binary Counter

Description

The HD74AC4024 is a 4-stage counter. This device is incremented on the falling edge (negative transition)

of the input clock, and all its output is reset to a low level by applying a logical high on its reset input.

Feature

•

Outputs Source/Sink 24 mA

Pin Arrangement

Clock

Reset

VCC

13 NC

12 Q1

11 Q2

10 NC

GND

(Top view)

12 3 4 5 6 7 8

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型号	品牌	获取价格	描述	数据表
HD74AC4024FP	ETC	获取价格	Asynchronous Up Counter
HD74AC4024P	ETC	获取价格	COUNTER\|UP\|7-BIT BINARY\|AC-CMOS\|DIP\|14PIN\|PLASTIC
HD74AC4024RP	ETC	获取价格	COUNTER\|UP\|7-BIT BINARY\|AC-CMOS\|SOP\|14PIN\|PLASTIC
HD74AC4024RP-EL	HITACHI	获取价格	暂无描述
HD74AC4024T	RENESAS	获取价格	AC SERIES, ASYN NEGATIVE EDGE TRIGGERED 7-BIT UP BINARY COUNTER, PDSO14, TSSOP-14
HD74AC4024T	HITACHI	获取价格	Binary Counter, AC Series, Asynchronous, Negative Edge Triggered, 7-Bit, Up Direction, CMO
HD74AC4060FP	ETC	获取价格	Asynchronous Up Counter
HD74AC4060P	ETC	获取价格	Asynchronous Up Counter
HD74AC4511FP	ETC	获取价格	Decoder/Driver
HD74AC4511P	ETC	获取价格	Decoder/Driver