Datasheet > HD74AC138ARPVEL

HD74AC138ARPVEL

更新时间： 2023-01-03 00:13:49

品牌	Logo	应用领域
瑞萨 - RENESAS		驱动光电二极管输出元件
页数	文件大小	规格书
10页	142K
描述
AC SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16, LEAD FREE, SOP-16

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HD74AC138ARPVEL 数据手册

HD74AC138/HD74ACT138

Logic Symbol

E2 E3

O0 O1 O2 O3 O4 O5 O6 O7

Pin Names

A₀to A₂

E₁to E ₂

E ₃

Address Inputs

Enable Inputs

Enable Input

O₀to O ₇Outputs

Functional Description

The HD74AC138/HD74ACT138 high-speed 1-of-8 decoder/demultiplexer accepts three binary weighted inputs (A₀, A₁,

A₂) and, when enabled, provides eight mutually exclusive active-LOW outputs (O₀to O₇). The

HD74AC138/HD74ACT138 features three Enable inputs, two active-Low (E₁, E₂) and one active-High (E₃). All

outputs will be High unless E₁and E₂are Low and E₃is High. This multiple enabled function allows easy parallel

expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four HD74AC138/HD74ACT138 devices

and one inverter (See Figure a). The HD74AC138/HD74ACT138 can be used as an 8-output demultiplexer by using

one of the active Low Enable inputs as the data input and the other Enable inputs as strobes. The Enables inputs which

are not used must be permanently tied to their appropriate active-High or active-Low state.

Truth Table

Inputs

A₀

Outputs

O ₃O ₄

E₁

E ₂

E₃

A₁

A₂

O₀

O ₁

O ₂

O ₅

O ₆

O ₇

H : High Voltage Level

Low Voltage Level

Immaterial

Rev.2.00, Jul.16.2004, page 2 of 9

123 4 5 6 7...10

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