2.8 Memory Map...................................................................................................................... 47
2.8.1 Memory Map ........................................................................................................ 47
2.9 Application Notes .............................................................................................................. 53
2.9.1 Notes on Data Access ........................................................................................... 53
2.9.2 Notes on Bit Manipulation.................................................................................... 55
2.9.3 Notes on Use of the EEPMOV Instruction........................................................... 61
Section 3 Exception Handling........................................................................................ 63
3.1 Overview............................................................................................................................ 63
3.2 Reset................................................................................................................................... 63
3.2.1 Overview............................................................................................................... 63
3.2.2 Reset Sequence ..................................................................................................... 63
3.2.3 Interrupt Immediately after Reset......................................................................... 65
3.3 Interrupts............................................................................................................................ 65
3.3.1 Overview............................................................................................................... 65
3.3.2 Interrupt Control Registers ................................................................................... 67
3.3.3 External Interrupts ................................................................................................ 76
3.3.4 Internal Interrupts.................................................................................................. 77
3.3.5 Interrupt Operations.............................................................................................. 78
3.3.6 Interrupt Response Time....................................................................................... 83
3.4 Application Notes .............................................................................................................. 84
3.4.1 Notes on Stack Area Use...................................................................................... 84
3.4.2 Notes on Rewriting Port Mode Registers ............................................................. 85
Section 4 Clock Pulse Generators................................................................................. 87
4.1 Overview............................................................................................................................ 87
4.1.1 Block Diagram...................................................................................................... 87
4.1.2 System Clock and Subclock.................................................................................. 87
4.2 System Clock Generator .................................................................................................... 88
4.3 Subclock Generator............................................................................................................ 91
4.4 Prescalers ........................................................................................................................... 93
4.5 Note on Oscillators ............................................................................................................ 94
Section 5 Power-Down Modes ...................................................................................... 95
5.1 Overview............................................................................................................................ 95
5.1.1 System Control Registers...................................................................................... 98
5.2 Sleep Mode ........................................................................................................................ 102
5.2.1 Transition to Sleep Mode...................................................................................... 102
5.2.2 Clearing Sleep Mode ............................................................................................ 103
5.2.3 Clock Frequency in Sleep (Medium-Speed) Mode .............................................. 103
5.3 Standby Mode.................................................................................................................... 103
5.3.1 Transition to Standby Mode.................................................................................. 103
5.3.2 Clearing Standby Mode........................................................................................ 104
iii
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