Datasheet > H0700KC14Y

H0700KC14Y

更新时间： 2024-01-21 16:56:02

品牌	Logo	应用领域
IXYS		/
页数	文件大小	规格书
15页	484K
描述
Symmetrical GTO SCR

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H0700KC14Y 技术参数

生命周期：	Transferred	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.76
Base Number Matches：	1

H0700KC14Y 数据手册

Fast Symmetrical Gate Turn-Off Thyristor type H0700KC14# to H0700KC17#

2 Characteristics

2.1 Instantaneous on-state voltage

Measured using a 500µs square pulse, see also the curves of figure 2 for other values of I_TM.

2.2 Latching and holding current

These are considered to be approximately equal and only the latching current is measured, type test only

as outlined below. The test circuit and wave diagrams are given in diagram 4. The anode current is

monitored on an oscilloscope while V_Dis increased, until the current is seen to flow during the un-gated

period between the end of I_Gand the application of reverse gate voltage. Test frequency is 100Hz with

I_GM& I_Gas for t_dof characteristic data.

I_G

100µs

I_GM

Gate current

16V

100µs

Anode current

unlatched condition

Unlatched

Anode current

Latched condition

DUT

Latched

Gate-drive

Diagram 4, Latching test circuit and waveforms.

2.3 Critical dv/dt

The gate conditions are the same as for 1.1, this characteristic is for off-state only and does not relate to

dv/dt at turn-off. The measurement, type test only, is conducted using the exponential ramp method as

shown in diagram 5. It should be noted that GTO thyristors have a poor static dv/dt capability if the gate is

open circuit or R_GKis high impedance. Typical values: - dv/dt<30V/µs for R_GK>10Ω.

Diagram 5, Definition of dV/dt.

2.4 Off-state leakage.

For I_DRM& I_RRMsee notes 1.1 & 1.2 for gate leakage I_GK, the off-state gate circuit is required to sink this

leakage and still maintain minimum of –2 Volts. See diagram 6.

Diagram 6.

Data Sheet. Type H0700KC14# to H0700KC17# Issue 2

Page 5 of 15

September, 2012

1 2 3 456 7 8...15

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