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GS9035ACTJE3 PDF预览

GS9035ACTJE3

更新时间： 2024-02-06 02:43:54
品牌 Logo 应用领域
GENNUM ATM异步传输模式电信电信集成电路
页数 文件大小 规格书
14页 239K
描述
ATM/SONET/SDH Clock Recovery Circuit, PQCC28,

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GS9035ACTJE3 技术参数

是否Rohs认证： 符合生命周期：Transferred
包装说明：QCCJ, LDCC28,.5SQReach Compliance Code：unknown
风险等级：5.82JESD-30 代码：S-PQCC-J28
端子数量：28最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：QCCJ封装等效代码：LDCC28,.5SQ
封装形状：SQUARE封装形式：CHIP CARRIER
电源：5 V认证状态：Not Qualified
子类别：ATM/SONET/SDH ICs最大压摆率：120 mA
标称供电电压：5 V表面贴装：YES
电信集成电路类型：ATM/SONET/SDH CLOCK RECOVERY CIRCUIT温度等级：COMMERCIAL
端子形式：J BEND端子节距：1.27 mm
端子位置：QUADBase Number Matches：1

GS9035ACTJE3 数据手册

 浏览型号GS9035ACTJE3的Datasheet PDF文件第2页浏览型号GS9035ACTJE3的Datasheet PDF文件第3页浏览型号GS9035ACTJE3的Datasheet PDF文件第4页浏览型号GS9035ACTJE3的Datasheet PDF文件第5页浏览型号GS9035ACTJE3的Datasheet PDF文件第6页浏览型号GS9035ACTJE3的Datasheet PDF文件第7页 
™
GENLINX II GS9035A  
Serial Digital Reclocker  
DATA SHEET  
FEATURES  
DESCRIPTION  
• adjustment-free operation  
The GS9035A is a high performance clock and data  
recovery IC designed for serial digital data. The GS9035A  
receives either single-ended or differential PECL data and  
outputs differential PECL clock and retimed data signals.  
• auto-rate selection for 5 SMPTE data rates: 143, 177,  
270, 360, 540Mb/s  
• data rate indication output  
The GS9035A can operate in either auto or manual rate  
selection mode. In auto mode the GS9035A is ideal for  
multi-rate serial data protocols such as SMPTE 259M. In this  
mode the GS9035A automatically detects and locks onto  
the incoming data signal. For single rate data systems, the  
GS9035A can be configured to operate in manual mode. In  
both modes, the GS9035A requires only one external  
resistor to set the VCO centre frequency and provides  
adjustment-free operation.  
• serial data output mute when PLL is not locked  
• immune to harmonic locking  
• operation independent of SAV/EAV sync signals  
• low jitter, low power  
• single external VCO resistor for operation with five  
input data rates  
• large input jitter tolerance: typically 0.45 UI beyond  
loop bandwidth  
• power savings mode (output serial clock disable)  
The GS9035A has dedicated pins to indicate LOCK and  
data rate. In addition, an internal muting function forces the  
serial data outputs to a static state when input data is not  
present or when the PLL is not locked. The serial clock  
outputs can also be disabled resulting in a 10% power  
savings.  
• system friendly: serial clock remains active when data  
outputs muted  
• robust lock detect  
• Pb-free and Green  
APPLICATIONS  
The GS9035A is packaged in a 28 pin PLCC and operates  
from a single +5 or -5 volt power supply.  
The GS9035A is used for Clock and Data recovery, and  
Jitter elimination for all high speed serial digital interface  
applications involving SMPTE 259M and other data  
standards.  
ORDERING INFORMATION  
PART NUMBER  
GS9035ACPJ  
PACKAGE  
28 pin PLCC  
TEMPERATURE  
0°C to 70°C  
0°C to 70°C  
0°C to 70°C  
0°C to 70°C  
Pb-FREE AND GREEN  
No  
No  
GS9035ACTJ  
28 pin PLCC Tape  
28 pin PLCC  
GS9035ACPJE3  
GS9035ACTJE3  
Yes  
Yes  
28 pin PLCC Tape  
C
OSC  
LOCK  
CARRIER DETECT  
PHASELOCK  
LOGIC  
HARMONIC  
SDO  
SDO  
FREQUENCY  
ACQUISITION  
2
CLK_EN  
SCO  
DDI/DDI  
PHASE  
DETECTOR  
SCO  
3 BIT  
COUNTER  
DIVISION  
SMPTE  
AUTO/MAN  
SSO  
SS1  
CHARGE  
PUMP  
DECODER  
VCO  
SS2  
LF+ LFS LF-  
CBG  
R
VCO  
BLOCK DIAGRAM  
Revision Date: June 2004  
Document No. 522 - 41 - 08  
GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3  
Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com  
www.gennum.com  
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