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GS9035C

更新时间： 2024-02-01 06:55:17
品牌 Logo 应用领域
GENNUM 时钟
页数 文件大小 规格书
14页 552K
描述
GENLINX II -TM GS9035C Serial Digital Reclocker

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GS9035C 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：QCCJ, LDCC28,.5SQReach Compliance Code：unknown
风险等级：5.9商用集成电路类型：CONSUMER CIRCUIT
JESD-30 代码：S-PQCC-J28端子数量：28
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：QCCJ
封装等效代码：LDCC28,.5SQ封装形状：SQUARE
封装形式：CHIP CARRIER电源：5 V
认证状态：Not Qualified子类别：Other Consumer ICs
最大压摆率：120 mA表面贴装：YES
技术：BIPOLAR温度等级：COMMERCIAL
端子形式：J BEND端子节距：1.27 mm
端子位置：QUADBase Number Matches：1

GS9035C 数据手册

 浏览型号GS9035C的Datasheet PDF文件第2页浏览型号GS9035C的Datasheet PDF文件第3页浏览型号GS9035C的Datasheet PDF文件第4页浏览型号GS9035C的Datasheet PDF文件第5页浏览型号GS9035C的Datasheet PDF文件第6页浏览型号GS9035C的Datasheet PDF文件第7页 
*(1/,1; ™,, GS9035C  
Serial Digital Reclocker  
DATA SHEET  
FEATURES  
DESCRIPTION  
• adjustment-free operation  
The GS9035C is a high performance clock and data  
recovery IC designed for serial digital data. The GS9035C  
receives either single-ended or differential PECL data and  
outputs differential PECL clock and retimed data signals.  
• auto-rate selection for 4 SMPTE data rates: 143, 177,  
270, 360Mb/s  
• data rate indication output  
The GS9035C can operate in either auto or manual rate  
selection mode. In auto mode the GS9035C is ideal for  
multi-rate serial data protocols such as SMPTE 259M. In this  
mode the GS9035C automatically detects and locks onto  
the incoming data signal. For single rate data systems, the  
GS9035C can be configured to operate in manual mode. In  
both modes, the GS9035C requires only one external  
resistor to set the VCO centre frequency and provides  
adjustment-free operation.  
• serial data output mute when PLL is not locked  
• operation independent of SAV/EAV sync signals  
• low jitter, low power  
• single external VCO resistor for operation with four  
input data rates  
• large input jitter tolerance: typically 0.50 UI beyond  
loop bandwidth at 270Mb/s  
• power savings mode (output serial clock disable)  
• system friendly: serial clock remains active when data  
outputs muted  
The GS9035C has dedicated pins to indicate LOCK and  
data rate. In addition, an internal muting function forces the  
serial data outputs to a static state when input data is not  
present or when the PLL is not locked. The serial clock  
outputs can also be disabled resulting in a 10% power  
savings.  
• robust lock detect  
APPLICATIONS  
The GS9035C is used for Clock and Data recovery, and  
Jitter elimination for all high speed serial digital interface  
applications involving SMPTE 259M and other data  
standards.  
The GS9035C is packaged in a 28 pin PLCC and operates  
from a single +5 or -5 volt power supply.  
ORDERING INFORMATION  
PART NUMBER  
GS9035CCPJ  
GS9035CCTJ  
PACKAGE  
28 pin PLCC  
TEMPERATURE  
0°C to 70°C  
28 pin PLCC Tape  
0°C to 70°C  
C
OSC  
LOCK  
SDO  
CARRIER DETECT  
PHASELOCK  
LOGIC  
HARMONIC  
FREQUENCY  
ACQUISITION  
SDO  
2
CLK_EN  
DDI/DDI  
PHASE  
DETECTOR  
SCO  
SCO  
2 BIT  
COUNTER  
DIVISION  
SMPTE  
AUTO/MAN  
SSO  
SS1  
CHARGE  
PUMP  
DECODER  
VCO  
LF+ LFS LF-  
CBG  
R
VCO  
BLOCK DIAGRAM  
Revision Date: June 2003  
Document No. 20582 - 3  
GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3  
Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com  
www.gennum.com  
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