Datasheet > GM71C17800CT-6

GM71C17800CT-6

更新时间： 2024-01-19 05:00:07

品牌	Logo	应用领域
海力士 - HYNIX		动态存储器
页数	文件大小	规格书
9页	94K
描述
x8 Fast Page Mode DRAM

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技术参数
数据手册

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GM71C17800CT-6 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
Reach Compliance Code：	unknown	风险等级：	5.3
访问模式：	FAST PAGE	最长访问时间：	60 ns
其他特性：	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH	I/O 类型：	COMMON
JESD-30 代码：	R-PDSO-G28	JESD-609代码：	e0
内存密度：	16777216 bit	内存集成电路类型：	FAST PAGE DRAM
内存宽度：	8	功能数量：	1
端口数量：	1	端子数量：	28
字数：	2097152 words	字数代码：	2000000
工作模式：	ASYNCHRONOUS	最高工作温度：	70 °C
最低工作温度：		组织：	2MX8
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSOP	封装等效代码：	TSOP28,.46
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	5 V
认证状态：	Not Qualified	刷新周期：	2048
自我刷新：	NO	最大待机电流：	0.001 A
子类别：	DRAMs	最大压摆率：	0.1 mA
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	1.27 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	Base Number Matches：	1

GM71C17800CT-6 数据手册

GM71C17800C

GM71CS17800CL

Notes:

AC Measurements assume tT = 5ns.

An initial pause of 200

is required after power up followed by a minimum of eight

initialization cycles (any combination of cycles containing RAS-only refresh or CAS-before-

RAS refresh). If the internal refresh counter is used, a minimum of eight CAS-before-RAS

refresh cycles are required.

Operation with the tRCD(max) limit insures that tRAC(max) can be met, tRCD(max) is specified as a

reference point only; if tRCD is greater than the specified tRCD(max) limit, then access time is

controlled exclusively by tCAC.

Operation with the tRAD(max) limit insures that tRAC(max) can be met, tRAD(max) is specified as a

reference point only; if tRAD is greater than the specified tRAD(max) limit, then access time is

controlled exclusively by tAA.

Either tODD or tCDD must be satisfied.

Either tDZO or tDZC must be satisfied.

VIH (min) and VIL (max) are reference levels for measuring timing of input signals. Also,

transition times are measured between VIH (min) and VIL (max).

Assumes that tRCD <= tRCD (max) and tRAD <= tRAD (max). If tRCD or tRAD is greater than the

maximum recommended value shown in this table, tRAC exceeds the value shown.

Measured with a load circuit equivalent to 2TTL loads and 100pF.(V_OH=2.4V , V_OL= 0.4V)

Assumes that tRCD >= tRCD (max) and tRAD <= tRAD (max).

10.

11.

12.

13.

Assumes that tRCD <= tRCD (max) and tRAD >= tRAD (max).

Either tRCH or tRRH must be satisfied for a read cycles.

tOFF (max) and tOEZ (max) define the time at which the outputs achieve the open circuit condition

and are not referred to output voltage levels.

tWCS, tRWD, tCWD and tAWD and tCPW are not restrictive operating parameters. They are included in

the data sheet as electrical characteristics only; if tWCS >=tWCS(min), the cycle is an early write

cycle and the data out pin will remain open circuit (high impedance) throughout the entire cycle;

if tRWD>=tRWD(min), tCWD>=tCWD(min), and tAWD>=tAWD(min) or tCWD>=tCWD(min),

14.

tAWD>=tAWD(min), and tCPW>=tCPW(min), the cycle is a read -modify- write and the data output

will contain data read from the selected cell; if neither of the above sets of conditions is

satisfied, the condition of the data out (at access time) is indeterminate.

These parameters are referred to CAS leading edge in early write cycle and to WE leading edge

in a delayed write or a read modify write cycle.

15.

tRASP defines RAS pulse width in fast page mode cycles.

16.

17.

18.

Access time is determined by the longer of tAA or tCAC or tACP.

In delayed write or read-modify-write cycles, OE must disable output buffer prior to applying

data to the device. After RAS is reset, if tOEH>=tCWL, the I/O pin will remain open circuit (high

impedance): if tOEH<=tCWL, invalid data will be out at each I/O.

Rev 0.1 / Apr’01

1...5 6 789

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与GM71C17800CT-6相关器件

型号	品牌	获取价格	描述	数据表
GM71C17800CT-7	HYNIX	获取价格	x8 Fast Page Mode DRAM
GM71C17803BJ-6	ETC	获取价格	x8 EDO Page Mode DRAM
GM71C17803BJ-7	ETC	获取价格	x8 EDO Page Mode DRAM
GM71C17803BJ-8	ETC	获取价格	x8 EDO Page Mode DRAM
GM71C17803BR-6	ETC	获取价格	x8 EDO Page Mode DRAM
GM71C17803BR-7	ETC	获取价格	x8 EDO Page Mode DRAM
GM71C17803BR-8	ETC	获取价格	x8 EDO Page Mode DRAM
GM71C17803BT-6	ETC	获取价格	x8 EDO Page Mode DRAM
GM71C17803BT-7	ETC	获取价格	x8 EDO Page Mode DRAM
GM71C17803BT-8	ETC	获取价格	x8 EDO Page Mode DRAM

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