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GC1115IZDJ PDF预览

GC1115IZDJ

更新时间: 2024-09-24 21:55:39
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
80页 860K
描述
Crest Factor Reduction Processor

GC1115IZDJ 数据手册

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GC1115  
www.ti.com  
SLWS144FEBRUARY 2005  
Crest Factor Reduction Processor  
FEATURES  
APPLICATIONS  
3GPP (W-CDMA) Base Stations  
3GPP2 (cdma2000) Base Stations  
CDMA Multi-Carrier Power Amps (MCPAs)  
CFR Reduction of OFDM, HSDPA Signals  
Two-Channel Transmit Diversity Applications  
Operates with TI DAC5687 (500 Msps)  
Significantly Reduces Signal Peaks to 6 dB  
PAR  
One 20-MHz or 2 Independent 10-MHz  
Channels  
Programmable Output PAR Down to 6 dB  
Programmable Cancellation Pulse Coefs  
Meets 3GPP TS 25.141 Down to 6 dB PAR  
Meets cdma2000 C.S0010 Down to 6 dB PAR  
256-ball PBGA Package, 17 × 17 mm  
1.2-V Core, 3.3 V I/O  
DESCRIPTION  
The GC1115 is a flexible, programmable, wideband crest factor reduction (CFR) processor with a maximum  
composite bandwidth of 20 MHz. The GC1115 selectively reduces the peak-to-average ratio (PAR) of wideband  
digital signals provided in quadrature (I & Q) format, such as those used in third-generation (3G) code division  
multiple access (CDMA) wireless applications. By reducing the PAR of digital signals, the efficiency of follow-on  
power amplifiers (PAs) is improved, the D/A converter requirements are eased, and the out-of-band spectral  
regrowth caused by simple hard limiting is eliminated.  
By including the GC1115, manufacturers of 3G BTS equipment can realize significant savings on power amplifier  
costs. The GC1115 meets multi-carrier 3G performance standards (PCDE, composite EVM, and ACLR) at PAR  
levels down to 6 dB. The GC1115 integrates easily into the transmit signal chain, between a digital upconverter  
such as the Texas Instruments GC5016 or GC5316 and a high-quality D/A converter, such as the Texas  
Instruments DAC5675 or DAC5687.  
The GC1115 uses four cascaded stages of peak detection and cancellation (PDC) to remove over-threshold  
peaks from the input signal. Each PDC stage can be independently programmed with detection target peak  
levels and cancellation pulse coefficients. A pool of 32 cancellation pulse generators can be flexibly assigned in  
groups of 4 to any PDC stage. Spectrally shaped cancellation pulses are designed using any of the widely  
available FIR filter design programs, such as those from Matlab™, ADS™, etc. Cancellation pulses are designed  
to match the user’s carrier frequency allocation. Cancellation pulse energy is bandlimited and thus is only added  
within allocated carrier bands. The GC1115’s peak cancellation algorithm does not affect the signal’s ACLR.  
Input sampling rates to 130 Msamp/sec are supported, in either parallel or multiplexed I/Q modes, and in either  
twos complement or unsigned format. Output sampling rates to 130 Msamp/sec are supported in either parallel  
or multiplexed I/Q modes, and in either twos complement or unsigned format. A special one-channel output  
mode uses both GC1115 output ports to carry odd/even real output samples. The GC1115 includes an  
interpolator that increases the output sampling rate by 2x or 4x and optionally modulates the output signal to the  
fs/4 center frequency. Dual on-chip RAM banks provide either time-domain snapshots or long-term  
histogramming of the internal peak cancellation signal chain at five user-selected points, enabling real-time  
monitoring of the CCDF function. A power level meter monitors either the GC1115 input or output power level.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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