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G693L263TAU

更新时间: 2024-02-27 03:00:44
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Power Management Circuit

G693L263TAU 数据手册

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Global Mixed-mode Technology Inc.  
G692/G693  
Pin Description  
PIN  
NAME  
FUNCTION  
SOT-143 SC-70-5  
1
1,2  
GND  
Ground  
RESET Output remains low while VCC is below the reset threshold, and for at least  
140ms after VCC rises above the reset threshold.  
RESET Output remains high while VCC is below the reset threshold, and for at least  
140ms after VCC rises above the reset threshold.  
RESET  
(G693L/G692L)  
RESET  
2
3
(G692H)  
Manual Reset Input. A logic low on MR asserts reset. Reset remains asserted as long  
as MR is low and for at least 140ms afterMR returns high, This active-low input has  
an internal 20kΩ pull- up resistor. It can be driven from a TTL or CMOS-logic line, or  
shorted to ground with a switch. Leave open if unused.  
3
4
5
4
MR  
VCC  
Supply Voltage (+5V, +3.3V, +3.0V)  
Detailed Description  
600  
A microprocessor's (µP's) reset input starts the µP in a  
known state. The G693L/G692L/G692H assert reset to  
prevent code-execution errors during power-up,  
power-down, or brownout conditions. They assert a  
reset signal whenever the VCC supply voltage declines  
below a preset threshold, keeping it asserted for at  
least 140ms after VCC has risen above the reset  
threshold. The G693L uses an open-drain output, and  
the G692L/G692H have a push-pull output stage. Con-  
500  
400  
300  
200  
100  
0
nect a pull-up resistor on the G693L's RESET output to  
any supply between 0 and 5.5V.  
G69__308/293/263  
The manual reset input (MR ) can also initiate a reset.  
See the Manual Reset Input Section.  
1
10  
100  
1000  
Reset Comparator Overdrive, VTH-VCC (mV)  
Manual Reset Input  
Many µP-based products require manual reset capabil-  
ity, allowing the operator, a test technician, or external  
Figure1. Maximum Transient Duration without  
Causing a Reset Pulse vs. Reset Com-  
parator Overdrive  
logic circuitry to initiate a reset. A logic low on MR as-  
serts reset. Reset remains asserted while MR is low,  
and for the Reset Active Timeout Period (tRP) after  
VCC  
MR returns high. This input has an internal 20kΩ  
pull-up resistor, so it can be left open if it is not used.  
MR can be driven with TTL or CMOS-logic levels, or  
with open-drain / collector outputs. Connect a normally  
G692  
RESET  
open momentary switch from MR to GND to create a  
manual-reset function; external debounce circuitry is  
R1  
100k  
GND  
not required. If MR is driven from long cables or if the  
device is used in a noisy environment, connecting a  
0.1µF capacitor from MR to ground provides additional  
noise immunity.  
Figure2. RESET Valid to VCC = Ground Circuit  
TEL: 886-3-5788833  
http://www.gmt.com.tw  
Ver: 1.7  
May 19, 2006  
5

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