Datasheet > FXLS8967AF

FXLS8967AF

更新时间： 2024-04-09 18:59:56

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
98页	1555K
描述
3-axis MEMS accelerometer for Automotive security and convenience apps that require ultra-low power ...

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FXLS8967AF 数据手册

NXP Semiconductors

FXLS8967AF

3-Axis Low-g Accelerometer

Table 3.ꢀPin descriptions...continued

Symbol

Description

INT2 / EXT_TRIG /

BOOT_OUT

Mode-dependent multifunction I/O pin 2.^[2]

BT_MODE = V_DD: Open-drain^[4]output signaling the device

boot process has completed. This pin is typically connected to

MOT_DET in a wired-AND configuration; a pull-up resistor is

required.

BT_MODE = GND: Programmable interrupt output pin 2^[5]

External measurement trigger input. This pin should be left

unconnected if unused in the application circuit.

SPI_CS_B / WAKE_UP

INT1 / MOT_DET

SPI chip select input, active low / Hibernate mode wake-

up pin.^[6]The WAKE_UP function is only available when

BT_MODE = GND.

Mode-dependent multifunction I/O pin 1.^[7]

BT_MODE = GND: Programmable interrupt output pin 1.^[5]

This pin should be left unconnected if unused in the application

circuit.

BT_MODE = V_DD: MOT_DET multifunction I/O.^[4]The host

MCU sets this pin high through a pull-up resistor to enable

motion detection, and drives it low for greater than T_MOT-HIB

ms to disable motion detection and enter Hibernate mode.

FXLS8967AF will pulse the line low for T_PULSE-MOTms after

motion is detected. This line may also be used to select

the motion detection threshold. See Section 14 for more

information.

INTF_SEL

GND

Device interface mode selection pin.

V_DD: SPI interface mode ^[3]

GND: I²C interface mode

10 Supply return connection.

[1] BT_MODE state is latched after POR.

[2] Under Hibernate mode, pin configuration is High Impedance.

[3] 3-wire SPI mode may be selected in SENS_CONFIG1[SPI_M]; 3-wire operation is also possible by directly connecting

the SPI_MISO and SPI_MOSI pins together on the PCB.

[4] An external pull-up resistor is required on this pin when BT_MODE = V_DD

[5] This pin is configurable as either an input or output (push-pull or open-drain/open-source output type), but defaults to a

push-pull output after POR, or after exiting Hibernate mode.

[6] Under Hibernate mode, pin configuration is High Impedance (when BT_MODE = V_DD) and CMOS Input (when BT_MODE

= GND).

[7] Under Hibernate mode, pin configuration is High Impedance (when BT_MODE = GND) and CMOS Input (when

BT_MODE = V_DD).

FXLS8967AF

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.5 — 11 March 2022

5 / 98

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