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FXL2SD106BQX

更新时间： 2024-01-16 20:20:45
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飞兆/仙童 - FAIRCHILD 转换器
页数 文件大小 规格书
14页 521K
描述
Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator with Configurable Voltage Supplies

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FXL2SD106BQX 数据手册

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June 2008  
FXL2SD106  
Low Voltage Dual Supply 6-Bit SD Interface Voltage  
Translator with Configurable Voltage Supplies and Signal  
Levels, 3-State Outputs, and Auto Direction Sensing  
Features  
General Description  
■ Bi-directional interface between two levels from 1.1V  
The FXL2SD106 is a configurable dual-voltage-supply  
translator designed for both uni-directional and bi-  
directional voltage translation between two logic levels.  
The device allows translation between voltages as high  
to 3.6V  
■ Fully configurable: Inputs and outputs track V level  
CC  
■ Non-preferential power-up; either VCC may be  
as 3.6V to as low as 1.1V. The A port tracks the V  
CCA  
powered-up first  
level, and the B port tracks the V  
level. This allows  
CCB  
■ Outputs remain in 3-state until active V level is  
CC  
for bi-directional voltage translation over a variety of volt-  
age levels: 1.2V, 1.5V, 1.8V, 2.5V and 3.3V.  
reached  
■ Outputs switch to 3-state if either V is at GND.  
CC  
The FXL2SD106 is specifically designed as a translator  
to interface with the SDIO standard. I/O capacitance is  
managed to meet the SD maximum capacitance specifi-  
cation. The B side ESD performance allows interface as  
an external card and the part can handle 80 Mbps  
throughput when translating between 1.8V and 2.5V.  
■ Power off protection  
■ Bushold on data inputs eliminates the need for SDIO  
pull-up resistors  
■ Control input (OE and CLK IN) are referenced to V  
CCA  
voltage  
■ Packaged in 16-terminal DQFN (2.5mm x 3.5mm)  
■ Direction control not needed  
The device remains in 3-state until both V s reach  
CC  
active levels allowing either V  
to be powered-up first.  
CC  
■ 80 Mbps throughput when translating between 1.8V  
Internal power down control circuits place the device in  
3-state if either VCC is removed.  
and 2.5V  
■ ESD protection exceeds:  
The OE input, when low, disables both the A and B ports  
by placing them in a 3-state condition. The FXL2SD106  
is designed so that both control pins (OE and CLK IN)  
– 12kV HBM (B port I/O to GND)  
(per JESD22-A114 & Mil Std 883e 3015.7)  
– 8kV HBM (A port I/O to GND)  
are supplied by V  
.
CCA  
(per JESD22-A114 & Mil Std 883e 3015.7)  
The device senses an input signal on A or B port  
automatically. The input signal is transferred to the other  
port.  
– 1kV CDM (per ESD STM 5.3)  
Ordering Information  
Order Number  
Package Number  
Package Description  
FXL2SD106BQX  
MLP16E  
16-Terminal Depopulated Quad Very-Thin Flat Pack,  
No Leads (DQFN), JEDEC MO-241, 2.5mm x 3.5mm  
All packages are lead free per JEDEC: J-STD-020B standard.  
©2008 Fairchild Semiconductor Corporation  
FXL2SD106 Rev. 1.8.0  
www.fairchildsemi.com  
1234567...14

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