EVDD430S/EVDD430CY
Input
Function
Supply 8V-35V
Ground
Vcc In
GND
Signal In
Disable
INV**
The Evaluation Boards are supplied with either IXDD408YI,
IXDD409YI, IXDI409YI, IXDN409YI or IXDD414YI 5-Pin TO-
263 devices installed, depending upon the evaluation board
part number ordered. To use the evaluation board with a
different package type, the installed device must be re-
moved, and the new device installed in the appropriate
location.
External drive signal
High for device disable
Output inversion
Under voltage select
UVSEL**
** Available on the EVDD430S board only
Figure 7 - PCB Connection Table
JP1 open for non-inverted output, jumpered for inverted
JP2 open for UVSEL at 12.5V, jumpered for 8.5V
TP1
Vcc In
R5 3.32
+
+
+
+
+
+
+
+
U1
+
1
28
Vcc
Vcc
Vcc
2
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
3
R3 JP1 JP2
2K
Vcc
Vcc
4
5
Vcc
Vcc
TP5
Drain
R7
R8
1
N/C
UVSEL
N/C
IN
OUT P
OUT P
OUT P
OUT N
OUT N
OUT N
GND
6
1
7
2
3
R11 220
R1 100
TP3
TP4
8
Signal In
Disable
Q1
TO-247
3
9
1
Q3
R9
1
EN
Q2
10
11
12
13
14
2
SOT-227
2N7000
INV
1,4
R10
1
GND
GND
GND
GND
2
GND
R6
GND
10K
GND
R4
49.9
R2
1K
RA
DA
Not Loaded
GND
TP2
Figure 8 EVDD430S Schematic Diagram
TP1
Vcc In
+
+
+
+
+
+
+
+
R3 10K
TP2
U1 / U2
2
3
CI / YI package
R1
1
3
Q2
1
TO-247
P1 Vcc
P2 OUT
Q3
SOT-227
2
1,4
P3 GND
P4 IN
P5 EN
R7 240
TP3
R2
1
Signal In
Q1
R5 100
TP4
2
2N7000
DA
RA
Not Loaded
Disable
R4 49.9
R6 1K
GND
TP5
Figure 9 - EVDD430CY Schematic Diagram
NOTE: The schematic shows two MOSFET devices. However only one device can be installed at any time.
3