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EPM240ZF100C

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EPM240ZF100C 数据手册

Section I. MAX II Device Family Data

Sheet

This section provides designers with the data sheet specifications for MAX II devices.

The chapters contain feature definitions of the internal architecture, Joint Test Action

Group (JTAG) and in-system programmability (ISP) information, DC operating

conditions, AC timing parameters, and ordering information for MAX II devices.

This section includes the following chapters:

■

Chapter 1, Introduction

Chapter 2, MAX II Architecture

Chapter 3, JTAG and In-System Programmability

Chapter 4, Hot Socketing and Power-On Reset in MAX II Devices

Chapter 5, DC and Switching Characteristics

Chapter 6, Reference and Ordering Information

Revision History

Refer to each chapter for its own specific revision history. For information about when

each chapter was updated, refer to the Chapter Revision Dates section, which appears

in the complete handbook.

MAX II Device Handbook

12 3 4 5 6 7...86

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型号	品牌	获取价格	描述	数据表
EPM240ZF100I	ALTERA	获取价格	MAX II Device Family
EPM240ZF256C3	ALTERA	获取价格	The MAX II family of instant-on, non-volatile CPLDs is based on a 0.18-m,
EPM240ZF256C5N	ALTERA	获取价格	The MAX II family of instant-on, non-volatile CPLDs is based on a 0.18-m,
EPM240ZM100A	ALTERA	获取价格	MAX II Device Family
EPM240ZM100A6N	INTEL	获取价格	Flash PLD, 7.9ns, 192-Cell, CMOS, PBGA100, 6 X 6 MM, 0.50 MM PITCH, LEAD FREE, MICRO, FBGA
EPM240ZM100C	ALTERA	获取价格	MAX II Device Family
EPM240ZM100I	ALTERA	获取价格	MAX II Device Family
EPM240ZM100I6N	INTEL	获取价格	Flash PLD, 7.9ns, 192-Cell, CMOS, PBGA100, 6 X 6 MM, 0.50 MM PITCH, LEAD FREE, MICRO, FBGA
EPM240ZM100I7N	INTEL	获取价格	Flash PLD, 12ns, 192-Cell, CMOS, PBGA100, 6 X 6 MM, 0.50 MM PITCH, LEAD FREE, MICRO, FBGA-
EPM240ZM68C6N	INTEL	获取价格	Flash PLD, 7.9ns, 192-Cell, CMOS, PBGA68, LEAD FREE, MICRO, FBGA-68