Datasheet > EPF10K200SPC240-3

EPF10K200SPC240-3

更新时间： 2023-08-15 00:00:00

品牌	Logo	应用领域
阿尔特拉 - ALTERA		/
页数	文件大小	规格书
120页	1901K
描述
Loadable PLD, 16ns, CMOS, PQFP240, 34.60 X 34.60 MM, 0.50 MM PITCH, PLASTIC, QFP-240

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

EPF10K200SPC240-3 数据手册

浏览型号EPF10K200SPC240-3的Datasheet PDF文件第2页

浏览型号EPF10K200SPC240-3的Datasheet PDF文件第3页

浏览型号EPF10K200SPC240-3的Datasheet PDF文件第4页

浏览型号EPF10K200SPC240-3的Datasheet PDF文件第5页

浏览型号EPF10K200SPC240-3的Datasheet PDF文件第6页

浏览型号EPF10K200SPC240-3的Datasheet PDF文件第7页

FLEX 10KE

Embedded Programmable

Logic Family

September 2000, ver. 2.10

Data Sheet

Embedded programmable logic devices (PLDs), providing

system-on-a-programmable-chip integration in a single device

Features...

–

Enhanced embedded array for implementing megafunctions

such as efficient memory and specialized logic functions

Dual-port capability with up to 16-bit width per embedded array

block (EAB)

Logic array for general logic functions

High density

–

30,000 to 200,000 typical gates (see Tables 1 and 2)

Up to 98,304 RAM bits (4,096 bits per EAB), all of which can be

used without reducing logic capacity

System-level features

–

MultiVolt^TMI/O pins can drive or be driven by 2.5-V, 3.3-V, or

5.0-V devices

–

Low power consumption

Bidirectional I/O performance (t and t ) up to 212 MHz

Fully compliant with the PCI Special Interest Group (PCI SIG)

PCI Local Bus Specification, Revision 2.2 for 3.3-V operation at

33 MHz or 66 MHz

–

-1 speed grade devices are compliant with PCI Local Bus

Specification, Revision 2.2, for 5.0-V operation

Built-in Joint Test Action Group (JTAG) boundary-scan test

(BST) circuitry compliant with IEEE Std. 1149.1-1990, available

without consuming additional device logic

For information on 5.0-V FLEX^®10K or 3.3-V FLEX 10KA devices, see the

FLEX 10K Embedded Programmable Logic Family Data Sheet.

Table 1. FLEX 10KE Device Features

Feature

EPF10K30E

EPF10K50E

EPF10K50S

EPF10K100B

Typical gates (1)

Maximum system gates

Logic elements (LEs)

EABs

30,000

119,000

1,728

50,000

199,000

2,880

100,000

158,000

4,992

Total RAM bits

24,576

220

40,960

254

24,576

191

Maximum user I/O pins

Altera Corporation

A-DS-F10KE-02.10

12 3 4 5 6 7...120

下载PDF

与EPF10K200SPC240-3相关器件

型号	品牌	描述	获取价格	数据表
EPF10K200SPI240-2	ALTERA	Loadable PLD, 12ns, CMOS, PQFP240, 34.60 X 34.60 MM, 0.50 MM PITCH, PLASTIC, QFP-240	获取价格
EPF10K200SRC240-1	ALTERA	Loadable PLD, 0.3ns, CMOS, PQFP240, 34.60 X 34.60 MM, 0.50 MM PITCH, RQFP-240	获取价格
EPF10K200SRC240-1N	ALTERA	Loadable PLD, 0.3ns, CMOS, PQFP240, 34.60 X 34.60 MM, 0.50 MM PITCH, RQFP-240	获取价格
EPF10K200SRC240-1X	ETC	Field Programmable Gate Array (FPGA)	获取价格
EPF10K200SRC240-2	ALTERA	Loadable PLD, 0.6ns, CMOS, PQFP240, 34.60 X 34.60 MM, 0.50 MM PITCH, RQFP-240	获取价格
EPF10K200SRC240-2N	ALTERA	Loadable PLD, 0.6ns, CMOS, PQFP240, 34.60 X 34.60 MM, 0.50 MM PITCH, RQFP-240	获取价格