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EP2AGX65DF29C6N PDF预览

EP2AGX65DF29C6N

更新时间: 2024-01-04 12:23:11
品牌 Logo 应用领域
英特尔 - INTEL 时钟可编程逻辑
页数 文件大小 规格书
78页 737K
描述
Field Programmable Gate Array, 500MHz, 60214-Cell, CMOS, PBGA780, 29 X 29 MM, LEAD FREE, MS-034, FBGA-780

EP2AGX65DF29C6N 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:29 X 29 MM, LEAD FREE, MS-034, FBGA-780Reach Compliance Code:compliant
ECCN代码:3A991HTS代码:8542.39.00.01
风险等级:5.25最大时钟频率:500 MHz
JESD-30 代码:S-PBGA-B780JESD-609代码:e1
长度:29 mm湿度敏感等级:3
输入次数:364逻辑单元数量:60214
输出次数:364端子数量:780
最高工作温度:85 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:HBGA
封装等效代码:BGA780,28X28,40封装形状:SQUARE
封装形式:GRID ARRAY, HEAT SINK/SLUG峰值回流温度(摄氏度):245
电源:0.9,1.2/3.3,1.5,2.5 V可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY
认证状态:Not Qualified座面最大高度:2.7 mm
子类别:Field Programmable Gate Arrays最大供电电压:0.93 V
最小供电电压:0.87 V标称供电电压:0.9 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:40
宽度:29 mmBase Number Matches:1

EP2AGX65DF29C6N 数据手册

 浏览型号EP2AGX65DF29C6N的Datasheet PDF文件第1页浏览型号EP2AGX65DF29C6N的Datasheet PDF文件第2页浏览型号EP2AGX65DF29C6N的Datasheet PDF文件第4页浏览型号EP2AGX65DF29C6N的Datasheet PDF文件第5页浏览型号EP2AGX65DF29C6N的Datasheet PDF文件第6页浏览型号EP2AGX65DF29C6N的Datasheet PDF文件第7页 
Chapter 1: Device Datasheet for Arria II Devices  
1–3  
Electrical Characteristics  
Table 1–2. Absolute Maximum Ratings for Arria II GZ Devices (Part 2 of 2)  
Symbol  
VCCA_L  
Description  
Supplies transceiver high voltage power (left side)  
Supplies transceiver high voltage power (right side)  
Supplies transceiver HIP digital power (left side)  
Supplies receiver power (left side)  
Minimum  
-0.5  
Maximum  
3.75  
Unit  
V
V
V
V
V
V
V
VCCA_R  
VCCHIP_L  
VCCR_L  
VCCR_R  
VCCT_L  
VCCT_R  
-0.5  
3.75  
-0.5  
1.35  
-0.5  
1.35  
Supplies receiver power (right side)  
-0.5  
1.35  
Supplies transmitter power (left side)  
-0.5  
1.35  
Supplies transmitter power (right side)  
-0.5  
1.35  
VCCL_GXBLn Supplies power to the transceiver PMA TX, PMA RX, and clocking (left  
(1) side)  
-0.5  
-0.5  
-0.5  
-0.5  
1.35  
1.35  
1.8  
V
V
V
V
VCCL_GXBRn Supplies power to the transceiver PMA TX, PMA RX, and clocking (right  
(1)  
side)  
VCCH_GXBLn  
(1)  
Supplies power to the transceiver PMA output (TX) buffer (left side)  
VCCH_GXBRn  
(1)  
Supplies power to the transceiver PMA output (TX) buffer (right side)  
1.8  
TJ  
Operating junction temperature  
Storage temperature (no bias)  
-55  
-65  
125  
150  
°C  
°C  
TSTG  
Note to Table 1–2:  
(1) n = 0, 1, or 2.  
Maximum Allowed Overshoot and Undershoot Voltage  
During transitions, input signals may overshoot to the voltage shown in Table 1–3 and  
undershoot to –2.0 V for magnitude of currents less than 100 mA and periods shorter  
than 20 ns.  
Table 1–3 lists the Arria II GX and GZ maximum allowed input overshoot voltage and  
the duration of the overshoot voltage as a percentage over the device lifetime. The  
maximum allowed overshoot duration is specified as a percentage of high-time over  
the lifetime of the device. A DC signal is equivalent to 100% duty cycle. For example,  
a signal that overshoots to 4.3 V can only be at 4.3 V for 5.41% over the lifetime of the  
device; for a device lifetime of 10 years, this amounts to 5.41/10ths of a year.  
December 2013 Altera Corporation  
Arria II Device Handbook Volume 3: Device Datasheet and Addendum  
 

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